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Searched refs:reg_tmp (Results 1 – 19 of 19) sorted by relevance

/hal_nxp-latest/s32/drivers/s32k3/Rte/src/
DSchM_Mcu.c206 register uint32 reg_tmp; in Mcu_schm_read_msr() local
208 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Mcu_schm_read_msr()
210 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Mcu_schm_read_msr()
213 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Mcu_schm_read_msr()
215 __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) ); in Mcu_schm_read_msr()
218 return (uint32)reg_tmp; in Mcu_schm_read_msr()
288 register uint32 reg_tmp; in Mcu_schm_read_msr() local
290 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Mcu_schm_read_msr()
292 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Mcu_schm_read_msr()
295 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Mcu_schm_read_msr()
[all …]
DSchM_Fls.c210 register uint32 reg_tmp; in Fls_schm_read_msr() local
212 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Fls_schm_read_msr()
214 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Fls_schm_read_msr()
217 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Fls_schm_read_msr()
219 __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) ); in Fls_schm_read_msr()
222 return (uint32)reg_tmp; in Fls_schm_read_msr()
292 register uint32 reg_tmp; in Fls_schm_read_msr() local
294 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Fls_schm_read_msr()
296 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Fls_schm_read_msr()
299 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Fls_schm_read_msr()
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DSchM_Pwm.c270 register uint32 reg_tmp; in Pwm_schm_read_msr() local
272 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Pwm_schm_read_msr()
274 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Pwm_schm_read_msr()
277 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Pwm_schm_read_msr()
279 __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) ); in Pwm_schm_read_msr()
282 return (uint32)reg_tmp; in Pwm_schm_read_msr()
352 register uint32 reg_tmp; in Pwm_schm_read_msr() local
354 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Pwm_schm_read_msr()
356 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Pwm_schm_read_msr()
359 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Pwm_schm_read_msr()
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DSchM_Icu.c286 register uint32 reg_tmp; in Icu_schm_read_msr() local
288 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Icu_schm_read_msr()
290 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Icu_schm_read_msr()
293 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Icu_schm_read_msr()
295 __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) ); in Icu_schm_read_msr()
298 return (uint32)reg_tmp; in Icu_schm_read_msr()
368 register uint32 reg_tmp; in Icu_schm_read_msr() local
370 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Icu_schm_read_msr()
372 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Icu_schm_read_msr()
375 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Icu_schm_read_msr()
[all …]
DSchM_Mcl.c294 register uint32 reg_tmp; in Mcl_schm_read_msr() local
296 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Mcl_schm_read_msr()
298 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Mcl_schm_read_msr()
301 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Mcl_schm_read_msr()
303 __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) ); in Mcl_schm_read_msr()
306 return (uint32)reg_tmp; in Mcl_schm_read_msr()
376 register uint32 reg_tmp; in Mcl_schm_read_msr() local
378 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Mcl_schm_read_msr()
380 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Mcl_schm_read_msr()
383 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Mcl_schm_read_msr()
[all …]
DSchM_Adc.c396 register uint32 reg_tmp; in Adc_schm_read_msr() local
398 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Adc_schm_read_msr()
400 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Adc_schm_read_msr()
403 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Adc_schm_read_msr()
405 __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) ); in Adc_schm_read_msr()
408 return (uint32)reg_tmp; in Adc_schm_read_msr()
478 register uint32 reg_tmp; in Adc_schm_read_msr() local
480 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Adc_schm_read_msr()
482 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Adc_schm_read_msr()
485 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Adc_schm_read_msr()
[all …]
/hal_nxp-latest/s32/drivers/s32k1/Rte/src/
DSchM_Mcu.c206 register uint32 reg_tmp; in Mcu_schm_read_msr() local
208 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Mcu_schm_read_msr()
210 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Mcu_schm_read_msr()
213 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Mcu_schm_read_msr()
215 __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) ); in Mcu_schm_read_msr()
218 return (uint32)reg_tmp; in Mcu_schm_read_msr()
288 register uint32 reg_tmp; in Mcu_schm_read_msr() local
290 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Mcu_schm_read_msr()
292 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Mcu_schm_read_msr()
295 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Mcu_schm_read_msr()
[all …]
/hal_nxp-latest/s32/drivers/s32ze/Rte/src/
DSchM_Mcu.c206 register uint32 reg_tmp; in Mcu_schm_read_msr() local
208 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Mcu_schm_read_msr()
210 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Mcu_schm_read_msr()
213 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Mcu_schm_read_msr()
215 __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) ); in Mcu_schm_read_msr()
218 return (uint32)reg_tmp; in Mcu_schm_read_msr()
288 register uint32 reg_tmp; in Mcu_schm_read_msr() local
290 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Mcu_schm_read_msr()
292 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Mcu_schm_read_msr()
295 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Mcu_schm_read_msr()
[all …]
DSchM_Mem_43_EXFLS.c210 register uint32 reg_tmp; in Mem_43_EXFLS_schm_read_msr() local
212 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Mem_43_EXFLS_schm_read_msr()
214 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Mem_43_EXFLS_schm_read_msr()
217 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Mem_43_EXFLS_schm_read_msr()
219 __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) ); in Mem_43_EXFLS_schm_read_msr()
222 return (uint32)reg_tmp; in Mem_43_EXFLS_schm_read_msr()
292 register uint32 reg_tmp; in Mem_43_EXFLS_schm_read_msr() local
294 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Mem_43_EXFLS_schm_read_msr()
296 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Mem_43_EXFLS_schm_read_msr()
299 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Mem_43_EXFLS_schm_read_msr()
[all …]
DSchM_Platform.c226 register uint32 reg_tmp; in Platform_schm_read_msr() local
228 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Platform_schm_read_msr()
230 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Platform_schm_read_msr()
233 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Platform_schm_read_msr()
235 __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) ); in Platform_schm_read_msr()
238 return (uint32)reg_tmp; in Platform_schm_read_msr()
308 register uint32 reg_tmp; in Platform_schm_read_msr() local
310 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Platform_schm_read_msr()
312 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Platform_schm_read_msr()
315 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Platform_schm_read_msr()
[all …]
DSchM_Spi.c238 register uint32 reg_tmp; in Spi_schm_read_msr() local
240 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Spi_schm_read_msr()
242 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Spi_schm_read_msr()
245 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Spi_schm_read_msr()
247 __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) ); in Spi_schm_read_msr()
250 return (uint32)reg_tmp; in Spi_schm_read_msr()
320 register uint32 reg_tmp; in Spi_schm_read_msr() local
322 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Spi_schm_read_msr()
324 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Spi_schm_read_msr()
327 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Spi_schm_read_msr()
[all …]
DSchM_Uart.c244 register uint32 reg_tmp; in Uart_schm_read_msr() local
246 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Uart_schm_read_msr()
248 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Uart_schm_read_msr()
251 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Uart_schm_read_msr()
253 __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) ); in Uart_schm_read_msr()
256 return (uint32)reg_tmp; in Uart_schm_read_msr()
326 register uint32 reg_tmp; in Uart_schm_read_msr() local
328 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Uart_schm_read_msr()
330 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Uart_schm_read_msr()
333 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Uart_schm_read_msr()
[all …]
DSchM_Can_43_CANEXCEL.c242 register uint32 reg_tmp; in Can_43_CANEXCEL_schm_read_msr() local
244 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Can_43_CANEXCEL_schm_read_msr()
246 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Can_43_CANEXCEL_schm_read_msr()
249 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Can_43_CANEXCEL_schm_read_msr()
251 __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) ); in Can_43_CANEXCEL_schm_read_msr()
254 return (uint32)reg_tmp; in Can_43_CANEXCEL_schm_read_msr()
324 register uint32 reg_tmp; in Can_43_CANEXCEL_schm_read_msr() local
326 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Can_43_CANEXCEL_schm_read_msr()
328 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Can_43_CANEXCEL_schm_read_msr()
331 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Can_43_CANEXCEL_schm_read_msr()
[all …]
DSchM_Eth_43_NETC.c258 register uint32 reg_tmp; in Eth_43_NETC_schm_read_msr() local
260 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Eth_43_NETC_schm_read_msr()
262 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Eth_43_NETC_schm_read_msr()
265 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Eth_43_NETC_schm_read_msr()
267 __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) ); in Eth_43_NETC_schm_read_msr()
270 return (uint32)reg_tmp; in Eth_43_NETC_schm_read_msr()
340 register uint32 reg_tmp; in Eth_43_NETC_schm_read_msr() local
342 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Eth_43_NETC_schm_read_msr()
344 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Eth_43_NETC_schm_read_msr()
347 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Eth_43_NETC_schm_read_msr()
[all …]
DSchM_Icu.c286 register uint32 reg_tmp; in Icu_schm_read_msr() local
288 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Icu_schm_read_msr()
290 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Icu_schm_read_msr()
293 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Icu_schm_read_msr()
295 __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) ); in Icu_schm_read_msr()
298 return (uint32)reg_tmp; in Icu_schm_read_msr()
368 register uint32 reg_tmp; in Icu_schm_read_msr() local
370 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Icu_schm_read_msr()
372 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Icu_schm_read_msr()
375 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Icu_schm_read_msr()
[all …]
DSchM_Mcl.c294 register uint32 reg_tmp; in Mcl_schm_read_msr() local
296 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Mcl_schm_read_msr()
298 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Mcl_schm_read_msr()
301 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Mcl_schm_read_msr()
303 __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) ); in Mcl_schm_read_msr()
306 return (uint32)reg_tmp; in Mcl_schm_read_msr()
376 register uint32 reg_tmp; in Mcl_schm_read_msr() local
378 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Mcl_schm_read_msr()
380 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Mcl_schm_read_msr()
383 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Mcl_schm_read_msr()
[all …]
DSchM_Pwm.c304 register uint32 reg_tmp; in Pwm_schm_read_msr() local
306 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Pwm_schm_read_msr()
308 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Pwm_schm_read_msr()
311 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Pwm_schm_read_msr()
313 __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) ); in Pwm_schm_read_msr()
316 return (uint32)reg_tmp; in Pwm_schm_read_msr()
386 register uint32 reg_tmp; in Pwm_schm_read_msr() local
388 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Pwm_schm_read_msr()
390 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Pwm_schm_read_msr()
393 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Pwm_schm_read_msr()
[all …]
DSchM_EthSwt_43_NETC.c328 register uint32 reg_tmp; in EthSwt_43_NETC_schm_read_msr() local
330 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in EthSwt_43_NETC_schm_read_msr()
332 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in EthSwt_43_NETC_schm_read_msr()
335 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in EthSwt_43_NETC_schm_read_msr()
337 __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) ); in EthSwt_43_NETC_schm_read_msr()
340 return (uint32)reg_tmp; in EthSwt_43_NETC_schm_read_msr()
410 register uint32 reg_tmp; in EthSwt_43_NETC_schm_read_msr() local
412 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in EthSwt_43_NETC_schm_read_msr()
414 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in EthSwt_43_NETC_schm_read_msr()
417 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in EthSwt_43_NETC_schm_read_msr()
[all …]
DSchM_Adc.c396 register uint32 reg_tmp; in Adc_schm_read_msr() local
398 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Adc_schm_read_msr()
400 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Adc_schm_read_msr()
403 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Adc_schm_read_msr()
405 __asm volatile( " mrs %0, primask " : "=r" (reg_tmp) ); in Adc_schm_read_msr()
408 return (uint32)reg_tmp; in Adc_schm_read_msr()
478 register uint32 reg_tmp; in Adc_schm_read_msr() local
480 __asm volatile( " mrs %x0, DAIF " : "=r" (reg_tmp) ); in Adc_schm_read_msr()
482 __asm volatile( " mrs %0, CPSR " : "=r" (reg_tmp) ); in Adc_schm_read_msr()
485 __asm volatile( " mrs %0, basepri " : "=r" (reg_tmp) ); in Adc_schm_read_msr()
[all …]