1 /*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2017, 2019-2020 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8 #ifndef FSL_RCM_H_
9 #define FSL_RCM_H_
10
11 #include "fsl_common.h"
12
13 /*! @addtogroup rcm */
14 /*! @{*/
15
16 /*******************************************************************************
17 * Definitions
18 ******************************************************************************/
19
20 /*! @name Driver version */
21 /*! @{ */
22 /*! @brief RCM driver version 2.0.4. */
23 #define FSL_RCM_DRIVER_VERSION (MAKE_VERSION(2, 0, 4))
24 /*! @} */
25
26 /*!
27 * @brief System Reset Source Name definitions
28 */
29 typedef enum _rcm_reset_source
30 {
31 #if (defined(FSL_FEATURE_RCM_REG_WIDTH) && (FSL_FEATURE_RCM_REG_WIDTH == 32))
32 /* RCM register bit width is 32. */
33 #if (defined(FSL_FEATURE_RCM_HAS_WAKEUP) && FSL_FEATURE_RCM_HAS_WAKEUP)
34 kRCM_SourceWakeup = RCM_SRS_WAKEUP_MASK, /*!< Low-leakage wakeup reset */
35 #endif
36 kRCM_SourceLvd = RCM_SRS_LVD_MASK, /*!< Low-voltage detect reset */
37 #if (defined(FSL_FEATURE_RCM_HAS_LOC) && FSL_FEATURE_RCM_HAS_LOC)
38 kRCM_SourceLoc = RCM_SRS_LOC_MASK, /*!< Loss of clock reset */
39 #endif /* FSL_FEATURE_RCM_HAS_LOC */
40 #if (defined(FSL_FEATURE_RCM_HAS_LOL) && FSL_FEATURE_RCM_HAS_LOL)
41 kRCM_SourceLol = RCM_SRS_LOL_MASK, /*!< Loss of lock reset */
42 #endif /* FSL_FEATURE_RCM_HAS_LOL */
43 kRCM_SourceWdog = RCM_SRS_WDOG_MASK, /*!< Watchdog reset */
44 kRCM_SourcePin = RCM_SRS_PIN_MASK, /*!< External pin reset */
45 kRCM_SourcePor = RCM_SRS_POR_MASK, /*!< Power on reset */
46 #if (defined(FSL_FEATURE_RCM_HAS_JTAG) && FSL_FEATURE_RCM_HAS_JTAG)
47 kRCM_SourceJtag = RCM_SRS_JTAG_MASK, /*!< JTAG generated reset */
48 #endif /* FSL_FEATURE_RCM_HAS_JTAG */
49 kRCM_SourceLockup = RCM_SRS_LOCKUP_MASK, /*!< Core lock up reset */
50 kRCM_SourceSw = RCM_SRS_SW_MASK, /*!< Software reset */
51 #if (defined(FSL_FEATURE_RCM_HAS_MDM_AP) && FSL_FEATURE_RCM_HAS_MDM_AP)
52 kRCM_SourceMdmap = RCM_SRS_MDM_AP_MASK, /*!< MDM-AP system reset */
53 #endif /* FSL_FEATURE_RCM_HAS_MDM_AP */
54 #if (defined(FSL_FEATURE_RCM_HAS_EZPORT) && FSL_FEATURE_RCM_HAS_EZPORT)
55 kRCM_SourceEzpt = RCM_SRS_EZPT_MASK, /*!< EzPort reset */
56 #endif /* FSL_FEATURE_RCM_HAS_EZPORT */
57 kRCM_SourceSackerr = RCM_SRS_SACKERR_MASK, /*!< Parameter could get all reset flags */
58
59 #else /* (FSL_FEATURE_RCM_REG_WIDTH == 32) */
60 /* RCM register bit width is 8. */
61 #if (defined(FSL_FEATURE_RCM_HAS_WAKEUP) && FSL_FEATURE_RCM_HAS_WAKEUP)
62 kRCM_SourceWakeup = RCM_SRS0_WAKEUP_MASK, /*!< Low-leakage wakeup reset */
63 #endif
64 kRCM_SourceLvd = RCM_SRS0_LVD_MASK, /*!< Low-voltage detect reset */
65 #if (defined(FSL_FEATURE_RCM_HAS_LOC) && FSL_FEATURE_RCM_HAS_LOC)
66 kRCM_SourceLoc = RCM_SRS0_LOC_MASK, /*!< Loss of clock reset */
67 #endif /* FSL_FEATURE_RCM_HAS_LOC */
68 #if (defined(FSL_FEATURE_RCM_HAS_LOL) && FSL_FEATURE_RCM_HAS_LOL)
69 kRCM_SourceLol = RCM_SRS0_LOL_MASK, /*!< Loss of lock reset */
70 #endif /* FSL_FEATURE_RCM_HAS_LOL */
71 kRCM_SourceWdog = RCM_SRS0_WDOG_MASK, /*!< Watchdog reset */
72 kRCM_SourcePin = RCM_SRS0_PIN_MASK, /*!< External pin reset */
73 kRCM_SourcePor = RCM_SRS0_POR_MASK, /*!< Power on reset */
74 #if (defined(FSL_FEATURE_RCM_HAS_JTAG) && FSL_FEATURE_RCM_HAS_JTAG)
75 kRCM_SourceJtag = RCM_SRS1_JTAG_MASK << 8U, /*!< JTAG generated reset */
76 #endif /* FSL_FEATURE_RCM_HAS_JTAG */
77 kRCM_SourceLockup = RCM_SRS1_LOCKUP_MASK << 8U, /*!< Core lock up reset */
78 kRCM_SourceSw = RCM_SRS1_SW_MASK << 8U, /*!< Software reset */
79 #if (defined(FSL_FEATURE_RCM_HAS_MDM_AP) && FSL_FEATURE_RCM_HAS_MDM_AP)
80 kRCM_SourceMdmap = RCM_SRS1_MDM_AP_MASK << 8U, /*!< MDM-AP system reset */
81 #endif /* FSL_FEATURE_RCM_HAS_MDM_AP */
82 #if (defined(FSL_FEATURE_RCM_HAS_EZPORT) && FSL_FEATURE_RCM_HAS_EZPORT)
83 kRCM_SourceEzpt = RCM_SRS1_EZPT_MASK << 8U, /*!< EzPort reset */
84 #endif /* FSL_FEATURE_RCM_HAS_EZPORT */
85 kRCM_SourceSackerr = RCM_SRS1_SACKERR_MASK << 8U, /*!< Parameter could get all reset flags */
86 #endif /* (FSL_FEATURE_RCM_REG_WIDTH == 32) */
87 kRCM_SourceAll = (int)0xffffffffU,
88 } rcm_reset_source_t;
89
90 /*!
91 * @brief Reset pin filter select in Run and Wait modes.
92 */
93 typedef enum _rcm_run_wait_filter_mode
94 {
95 kRCM_FilterDisable = 0U, /*!< All filtering disabled */
96 kRCM_FilterBusClock = 1U, /*!< Bus clock filter enabled */
97 kRCM_FilterLpoClock = 2U /*!< LPO clock filter enabled */
98 } rcm_run_wait_filter_mode_t;
99
100 #if (defined(FSL_FEATURE_RCM_HAS_BOOTROM) && FSL_FEATURE_RCM_HAS_BOOTROM)
101 /*!
102 * @brief Boot from ROM configuration.
103 */
104 typedef enum _rcm_boot_rom_config
105 {
106 kRCM_BootFlash = 0U, /*!< Boot from flash */
107 kRCM_BootRomCfg0 = 1U, /*!< Boot from boot ROM due to BOOTCFG0 */
108 kRCM_BootRomFopt = 2U, /*!< Boot from boot ROM due to FOPT[7] */
109 kRCM_BootRomBoth = 3U /*!< Boot from boot ROM due to both BOOTCFG0 and FOPT[7] */
110 } rcm_boot_rom_config_t;
111 #endif /* FSL_FEATURE_RCM_HAS_BOOTROM */
112
113 #if (defined(FSL_FEATURE_RCM_HAS_SRIE) && FSL_FEATURE_RCM_HAS_SRIE)
114 /*!
115 * @brief Maximum delay time from interrupt asserts to system reset.
116 */
117 typedef enum _rcm_reset_delay
118 {
119 kRCM_ResetDelay8Lpo = 0U, /*!< Delay 8 LPO cycles. */
120 kRCM_ResetDelay32Lpo = 1U, /*!< Delay 32 LPO cycles. */
121 kRCM_ResetDelay128Lpo = 2U, /*!< Delay 128 LPO cycles. */
122 kRCM_ResetDelay512Lpo = 3U /*!< Delay 512 LPO cycles. */
123 } rcm_reset_delay_t;
124
125 /*!
126 * @brief System reset interrupt enable bit definitions.
127 */
128 typedef enum _rcm_interrupt_enable
129 {
130 kRCM_IntNone = 0U, /*!< No interrupt enabled. */
131 kRCM_IntLossOfClk = RCM_SRIE_LOC_MASK, /*!< Loss of clock interrupt. */
132 kRCM_IntLossOfLock = RCM_SRIE_LOL_MASK, /*!< Loss of lock interrupt. */
133 kRCM_IntWatchDog = RCM_SRIE_WDOG_MASK, /*!< Watch dog interrupt. */
134 kRCM_IntExternalPin = RCM_SRIE_PIN_MASK, /*!< External pin interrupt. */
135 kRCM_IntGlobal = RCM_SRIE_GIE_MASK, /*!< Global interrupts. */
136 kRCM_IntCoreLockup = RCM_SRIE_LOCKUP_MASK, /*!< Core lock up interrupt */
137 kRCM_IntSoftware = RCM_SRIE_SW_MASK, /*!< software interrupt */
138 kRCM_IntStopModeAckErr = RCM_SRIE_SACKERR_MASK, /*!< Stop mode ACK error interrupt. */
139 #if (defined(FSL_FEATURE_RCM_HAS_CORE1) && FSL_FEATURE_RCM_HAS_CORE1)
140 kRCM_IntCore1 = RCM_SRIE_CORE1_MASK, /*!< Core 1 interrupt. */
141 #endif
142 kRCM_IntAll = RCM_SRIE_LOC_MASK /*!< Enable all interrupts. */
143 | RCM_SRIE_LOL_MASK | RCM_SRIE_WDOG_MASK | RCM_SRIE_PIN_MASK | RCM_SRIE_GIE_MASK |
144 RCM_SRIE_LOCKUP_MASK | RCM_SRIE_SW_MASK | RCM_SRIE_SACKERR_MASK
145 #if (defined(FSL_FEATURE_RCM_HAS_CORE1) && FSL_FEATURE_RCM_HAS_CORE1)
146 | RCM_SRIE_CORE1_MASK
147 #endif
148 } rcm_interrupt_enable_t;
149 #endif /* FSL_FEATURE_RCM_HAS_SRIE */
150
151 #if (defined(FSL_FEATURE_RCM_HAS_VERID) && FSL_FEATURE_RCM_HAS_VERID)
152 /*!
153 * @brief IP version ID definition.
154 */
155 typedef struct _rcm_version_id
156 {
157 uint16_t feature; /*!< Feature Specification Number. */
158 uint8_t minor; /*!< Minor version number. */
159 uint8_t major; /*!< Major version number. */
160 } rcm_version_id_t;
161 #endif
162
163 /*!
164 * @brief Reset pin filter configuration.
165 */
166 typedef struct _rcm_reset_pin_filter_config
167 {
168 bool enableFilterInStop; /*!< Reset pin filter select in stop mode. */
169 rcm_run_wait_filter_mode_t filterInRunWait; /*!< Reset pin filter in run/wait mode. */
170 uint8_t busClockFilterCount; /*!< Reset pin bus clock filter width. */
171 } rcm_reset_pin_filter_config_t;
172
173 /*******************************************************************************
174 * API
175 ******************************************************************************/
176 #if defined(__cplusplus)
177 extern "C" {
178 #endif /* __cplusplus*/
179
180 /*! @name Reset Control Module APIs*/
181 /*! @{ */
182
183 #if (defined(FSL_FEATURE_RCM_HAS_VERID) && FSL_FEATURE_RCM_HAS_VERID)
184 /*!
185 * @brief Gets the RCM version ID.
186 *
187 * This function gets the RCM version ID including the major version number,
188 * the minor version number, and the feature specification number.
189 *
190 * @param base RCM peripheral base address.
191 * @param versionId Pointer to the version ID structure.
192 */
RCM_GetVersionId(RCM_Type * base,rcm_version_id_t * versionId)193 static inline void RCM_GetVersionId(RCM_Type *base, rcm_version_id_t *versionId)
194 {
195 uint32_t tmp = base->VERID;
196
197 versionId->feature = (uint16_t)(tmp & 0x0000FFFFUL);
198 versionId->minor = (uint8_t)((tmp & 0x00FF0000UL) >> 16U);
199 versionId->major = (uint8_t)((tmp & 0x000000FFUL) >> 24U);
200 }
201 #endif
202
203 #if (defined(FSL_FEATURE_RCM_HAS_PARAM) && FSL_FEATURE_RCM_HAS_PARAM)
204 /*!
205 * @brief Gets the reset source implemented status.
206 *
207 * This function gets the RCM parameter that indicates whether the corresponding reset source is implemented.
208 * Use source masks defined in the rcm_reset_source_t to get the desired source status.
209 *
210 * This is an example.
211 * @code
212 * uint32_t status;
213 *
214 * To test whether the MCU is reset using Watchdog.
215 * status = RCM_GetResetSourceImplementedStatus(RCM) & (kRCM_SourceWdog | kRCM_SourcePin);
216 * @endcode
217 *
218 * @param base RCM peripheral base address.
219 * @return All reset source implemented status bit map.
220 */
RCM_GetResetSourceImplementedStatus(RCM_Type * base)221 static inline uint32_t RCM_GetResetSourceImplementedStatus(RCM_Type *base)
222 {
223 return base->PARAM;
224 }
225 #endif /* FSL_FEATURE_RCM_HAS_PARAM */
226
227 /*!
228 * @brief Gets the reset source status which caused a previous reset.
229 *
230 * This function gets the current reset source status. Use source masks
231 * defined in the rcm_reset_source_t to get the desired source status.
232 *
233 * This is an example.
234 * @code
235 * uint32_t resetStatus;
236 *
237 * To get all reset source statuses.
238 * resetStatus = RCM_GetPreviousResetSources(RCM) & kRCM_SourceAll;
239 *
240 * To test whether the MCU is reset using Watchdog.
241 * resetStatus = RCM_GetPreviousResetSources(RCM) & kRCM_SourceWdog;
242 *
243 * To test multiple reset sources.
244 * resetStatus = RCM_GetPreviousResetSources(RCM) & (kRCM_SourceWdog | kRCM_SourcePin);
245 * @endcode
246 *
247 * @param base RCM peripheral base address.
248 * @return All reset source status bit map.
249 */
RCM_GetPreviousResetSources(RCM_Type * base)250 static inline uint32_t RCM_GetPreviousResetSources(RCM_Type *base)
251 {
252 #if (defined(FSL_FEATURE_RCM_REG_WIDTH) && (FSL_FEATURE_RCM_REG_WIDTH == 32))
253 return base->SRS;
254 #else
255 uint8_t tmpSrs0 = base->SRS0;
256 uint8_t tmpSrs1 = base->SRS1;
257 return (uint32_t)((uint32_t)tmpSrs0 | ((uint32_t)tmpSrs1 << 8U));
258 #endif /* (FSL_FEATURE_RCM_REG_WIDTH == 32) */
259 }
260
261 #if (defined(FSL_FEATURE_RCM_HAS_SSRS) && FSL_FEATURE_RCM_HAS_SSRS)
262 /*!
263 * @brief Gets the sticky reset source status.
264 *
265 * This function gets the current reset source status that has not been cleared
266 * by software for a specific source.
267 *
268 * This is an example.
269 * @code
270 * uint32_t resetStatus;
271 *
272 * To get all reset source statuses.
273 * resetStatus = RCM_GetStickyResetSources(RCM) & kRCM_SourceAll;
274 *
275 * To test whether the MCU is reset using Watchdog.
276 * resetStatus = RCM_GetStickyResetSources(RCM) & kRCM_SourceWdog;
277 *
278 * To test multiple reset sources.
279 * resetStatus = RCM_GetStickyResetSources(RCM) & (kRCM_SourceWdog | kRCM_SourcePin);
280 * @endcode
281 *
282 * @param base RCM peripheral base address.
283 * @return All reset source status bit map.
284 */
RCM_GetStickyResetSources(RCM_Type * base)285 static inline uint32_t RCM_GetStickyResetSources(RCM_Type *base)
286 {
287 #if (defined(FSL_FEATURE_RCM_REG_WIDTH) && (FSL_FEATURE_RCM_REG_WIDTH == 32))
288 return base->SSRS;
289 #else
290 return (base->SSRS0 | ((uint32_t)base->SSRS1 << 8U));
291 #endif /* (FSL_FEATURE_RCM_REG_WIDTH == 32) */
292 }
293
294 /*!
295 * @brief Clears the sticky reset source status.
296 *
297 * This function clears the sticky system reset flags indicated by source masks.
298 *
299 * This is an example.
300 * @code
301 * Clears multiple reset sources.
302 * RCM_ClearStickyResetSources(kRCM_SourceWdog | kRCM_SourcePin);
303 * @endcode
304 *
305 * @param base RCM peripheral base address.
306 * @param sourceMasks reset source status bit map
307 */
RCM_ClearStickyResetSources(RCM_Type * base,uint32_t sourceMasks)308 static inline void RCM_ClearStickyResetSources(RCM_Type *base, uint32_t sourceMasks)
309 {
310 #if (defined(FSL_FEATURE_RCM_REG_WIDTH) && (FSL_FEATURE_RCM_REG_WIDTH == 32))
311 base->SSRS = sourceMasks;
312 #else
313 base->SSRS0 = (uint8_t)(sourceMasks & 0xffU);
314 base->SSRS1 = (uint8_t)((sourceMasks >> 8U) & 0xffU);
315 #endif /* (FSL_FEATURE_RCM_REG_WIDTH == 32) */
316 }
317 #endif /* FSL_FEATURE_RCM_HAS_SSRS */
318
319 /*!
320 * @brief Configures the reset pin filter.
321 *
322 * This function sets the reset pin filter including the filter source, filter
323 * width, and so on.
324 *
325 * @param base RCM peripheral base address.
326 * @param config Pointer to the configuration structure.
327 */
328 void RCM_ConfigureResetPinFilter(RCM_Type *base, const rcm_reset_pin_filter_config_t *config);
329
330 #if (defined(FSL_FEATURE_RCM_HAS_EZPMS) && FSL_FEATURE_RCM_HAS_EZPMS)
331 /*!
332 * @brief Gets the EZP_MS_B pin assert status.
333 *
334 * This function gets the easy port mode status (EZP_MS_B) pin assert status.
335 *
336 * @param base RCM peripheral base address.
337 * @return status true - asserted, false - reasserted
338 */
RCM_GetEasyPortModePinStatus(RCM_Type * base)339 static inline bool RCM_GetEasyPortModePinStatus(RCM_Type *base)
340 {
341 return (bool)(base->MR & RCM_MR_EZP_MS_MASK);
342 }
343 #endif /* FSL_FEATURE_RCM_HAS_EZPMS */
344
345 #if (defined(FSL_FEATURE_RCM_HAS_BOOTROM) && FSL_FEATURE_RCM_HAS_BOOTROM)
346 /*!
347 * @brief Gets the ROM boot source.
348 *
349 * This function gets the ROM boot source during the last chip reset.
350 *
351 * @param base RCM peripheral base address.
352 * @return The ROM boot source.
353 */
RCM_GetBootRomSource(RCM_Type * base)354 static inline rcm_boot_rom_config_t RCM_GetBootRomSource(RCM_Type *base)
355 {
356 return (rcm_boot_rom_config_t)(uint8_t)((base->MR & RCM_MR_BOOTROM_MASK) >> RCM_MR_BOOTROM_SHIFT);
357 }
358
359 /*!
360 * @brief Clears the ROM boot source flag.
361 *
362 * This function clears the ROM boot source flag.
363 *
364 * @param base Register base address of RCM
365 */
RCM_ClearBootRomSource(RCM_Type * base)366 static inline void RCM_ClearBootRomSource(RCM_Type *base)
367 {
368 base->MR |= RCM_MR_BOOTROM_MASK;
369 }
370
371 /*!
372 * @brief Forces the boot from ROM.
373 *
374 * This function forces booting from ROM during all subsequent system resets.
375 *
376 * @param base RCM peripheral base address.
377 * @param config Boot configuration.
378 */
379 void RCM_SetForceBootRomSource(RCM_Type *base, rcm_boot_rom_config_t config);
380 #endif /* FSL_FEATURE_RCM_HAS_BOOTROM */
381
382 #if (defined(FSL_FEATURE_RCM_HAS_SRIE) && FSL_FEATURE_RCM_HAS_SRIE)
383 /*!
384 * @brief Sets the system reset interrupt configuration.
385 *
386 * For a graceful shut down, the RCM supports delaying the assertion of the system
387 * reset for a period of time when the reset interrupt is generated. This function
388 * can be used to enable the interrupt and the delay period. The interrupts
389 * are passed in as bit mask. See rcm_int_t for details. For example, to
390 * delay a reset for 512 LPO cycles after the WDOG timeout or loss-of-clock occurs,
391 * configure as follows:
392 * RCM_SetSystemResetInterruptConfig(kRCM_IntWatchDog | kRCM_IntLossOfClk, kRCM_ResetDelay512Lpo);
393 *
394 * @param base RCM peripheral base address.
395 * @param intMask Bit mask of the system reset interrupts to enable. See
396 * rcm_interrupt_enable_t for details.
397 * @param delay Bit mask of the system reset interrupts to enable.
398 */
RCM_SetSystemResetInterruptConfig(RCM_Type * base,uint32_t intMask,rcm_reset_delay_t delay)399 static inline void RCM_SetSystemResetInterruptConfig(RCM_Type *base, uint32_t intMask, rcm_reset_delay_t delay)
400 {
401 base->SRIE = (intMask | (uint32_t)delay);
402 }
403 #endif /* FSL_FEATURE_RCM_HAS_SRIE */
404 /*! @} */
405
406 #if defined(__cplusplus)
407 }
408 #endif /* __cplusplus*/
409
410 /*! @}*/
411
412 #endif /* FSL_RCM_H_ */
413
