Searched refs:pclk_div2 (Results 1 – 2 of 2) sorted by relevance
165 …bool pclk_div2; /* Input Data Format Register 0x70, Reg_PCLKDiv2, 0: IO latch clock = TxCLK, 1: IO… member
472 it6161.hdmi_tx.pclk_div2 = HDMI_TX_PCLK_DIV2; in IT6161_Init()
