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Searched refs:mu (Results 1 – 25 of 214) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/elemu/
Dfsl_elemu.c19 static status_t ELEMU_StartupWait(ELEMU_Type *mu);
49 void ELEMU_mu_hal_send_data(ELEMU_Type *mu, uint8_t regid, uint32_t *data) in ELEMU_mu_hal_send_data() argument
52 while ((mu->TSR & mask) == 0u) in ELEMU_mu_hal_send_data()
55 mu->TR[regid] = *data; in ELEMU_mu_hal_send_data()
58 void ELEMU_mu_hal_receive_data(ELEMU_Type *mu, uint8_t regid, uint32_t *data) in ELEMU_mu_hal_receive_data() argument
62 while ((mu->RSR & mask) == 0u) in ELEMU_mu_hal_receive_data()
65 *data = mu->RR[regid]; in ELEMU_mu_hal_receive_data()
66 while (((mu->RSR & mask) != 0u) && (read_retries != 0u)) in ELEMU_mu_hal_receive_data()
68 *data = mu->RR[regid]; in ELEMU_mu_hal_receive_data()
73 status_t ELEMU_mu_hal_receive_data_wait(ELEMU_Type *mu, uint8_t regid, uint32_t *data, uint32_t wai… in ELEMU_mu_hal_receive_data_wait() argument
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Dfsl_elemu.h45 void ELEMU_mu_hal_send_data(ELEMU_Type *mu, uint8_t regid, uint32_t *data);
46 void ELEMU_mu_hal_receive_data(ELEMU_Type *mu, uint8_t regid, uint32_t *data);
47 status_t ELEMU_mu_hal_receive_data_wait(ELEMU_Type *mu, uint8_t regid, uint32_t *data, uint32_t wai…
48 status_t ELEMU_mu_read_message(ELEMU_Type *mu, uint32_t *buf, uint8_t *size, uint8_t read_header);
49 status_t ELEMU_mu_read_data_wait(ELEMU_Type *mu, uint32_t buf[], uint8_t *size, uint32_t wait);
51 status_t ELEMU_mu_send_message(ELEMU_Type *mu, uint32_t buf[], size_t wordCount);
52 status_t ELEMU_mu_get_response(ELEMU_Type *mu, uint32_t *buf, size_t wordCount);
53 status_t ELEMU_mu_wait_for_data(ELEMU_Type *mu, uint32_t *buf, size_t wordCount, uint32_t wait);
55 status_t ELEMU_mu_wait_for_ready(ELEMU_Type *mu, uint32_t wait);
58 elemu_ownership_status_t ELEMU_mu_get_ownership_status(ELEMU_Type *mu);
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1181/drivers/
Dfsl_ele_base_api.c26 static status_t nvm_storage_handle_req_baseapi(S3MU_Type *mu, uint32_t *buf, uint32_t wordCount) in nvm_storage_handle_req_baseapi() argument
43 static status_t ele_mu_get_response_baseapi(S3MU_Type *mu, uint32_t *buf) in ele_mu_get_response_baseapi() argument
51 status = S3MU_GetResponse(mu, rmsg); in ele_mu_get_response_baseapi()
64 status = nvm_storage_handle_req_baseapi(mu, rmsg, msg->hdr_byte.size); in ele_mu_get_response_baseapi()
91 status_t ELE_BaseAPI_Ping(S3MU_Type *mu) in ELE_BaseAPI_Ping() argument
100 status = S3MU_SendMessage(mu, tmsg, PING_SIZE); in ELE_BaseAPI_Ping()
107 status = ele_mu_get_response_baseapi(mu, rmsg); in ELE_BaseAPI_Ping()
135 status_t ELE_BaseAPI_GetFwVersion(S3MU_Type *mu, uint32_t *EleFwVersion) in ELE_BaseAPI_GetFwVersion() argument
144 status = S3MU_SendMessage(mu, tmsg, GET_FW_VERSION_SIZE); in ELE_BaseAPI_GetFwVersion()
151 status = ele_mu_get_response_baseapi(mu, rmsg); in ELE_BaseAPI_GetFwVersion()
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Dfsl_ele_base_api.h114 status_t ELE_BaseAPI_Ping(S3MU_Type *mu);
127 status_t ELE_BaseAPI_GetFwVersion(S3MU_Type *mu, uint32_t *EleFwVersion);
140 status_t ELE_BaseAPI_GetFwStatus(S3MU_Type *mu, uint32_t *EleFwStatus);
152 status_t ELE_BaseAPI_EnableAPC(S3MU_Type *mu);
169 status_t ELE_BaseAPI_ForwardLifecycle(S3MU_Type *mu, uint32_t Lifecycle);
185 status_t ELE_BaseAPI_ReleaseRDC(S3MU_Type *mu, uint32_t RdcID, uint32_t CoreID);
197 status_t ELE_BaseAPI_StartRng(S3MU_Type *mu);
209 status_t ELE_BaseAPI_EnableOtfad(S3MU_Type *mu, uint8_t OtfadID);
219 status_t ELE_BaseAPI_ClockChangeStart(S3MU_Type *mu);
233 status_t ELE_BaseAPI_ClockChangeFinish(S3MU_Type *mu, uint8_t NewClockRateELE, uint8_t NewClockRate…
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1189/drivers/
Dfsl_ele_base_api.c26 static status_t nvm_storage_handle_req_baseapi(S3MU_Type *mu, uint32_t *buf, uint32_t wordCount) in nvm_storage_handle_req_baseapi() argument
43 static status_t ele_mu_get_response_baseapi(S3MU_Type *mu, uint32_t *buf) in ele_mu_get_response_baseapi() argument
51 status = S3MU_GetResponse(mu, rmsg); in ele_mu_get_response_baseapi()
64 status = nvm_storage_handle_req_baseapi(mu, rmsg, msg->hdr_byte.size); in ele_mu_get_response_baseapi()
91 status_t ELE_BaseAPI_Ping(S3MU_Type *mu) in ELE_BaseAPI_Ping() argument
100 status = S3MU_SendMessage(mu, tmsg, PING_SIZE); in ELE_BaseAPI_Ping()
107 status = ele_mu_get_response_baseapi(mu, rmsg); in ELE_BaseAPI_Ping()
135 status_t ELE_BaseAPI_GetFwVersion(S3MU_Type *mu, uint32_t *EleFwVersion) in ELE_BaseAPI_GetFwVersion() argument
144 status = S3MU_SendMessage(mu, tmsg, GET_FW_VERSION_SIZE); in ELE_BaseAPI_GetFwVersion()
151 status = ele_mu_get_response_baseapi(mu, rmsg); in ELE_BaseAPI_GetFwVersion()
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Dfsl_ele_base_api.h114 status_t ELE_BaseAPI_Ping(S3MU_Type *mu);
127 status_t ELE_BaseAPI_GetFwVersion(S3MU_Type *mu, uint32_t *EleFwVersion);
140 status_t ELE_BaseAPI_GetFwStatus(S3MU_Type *mu, uint32_t *EleFwStatus);
152 status_t ELE_BaseAPI_EnableAPC(S3MU_Type *mu);
169 status_t ELE_BaseAPI_ForwardLifecycle(S3MU_Type *mu, uint32_t Lifecycle);
185 status_t ELE_BaseAPI_ReleaseRDC(S3MU_Type *mu, uint32_t RdcID, uint32_t CoreID);
197 status_t ELE_BaseAPI_StartRng(S3MU_Type *mu);
209 status_t ELE_BaseAPI_EnableOtfad(S3MU_Type *mu, uint8_t OtfadID);
219 status_t ELE_BaseAPI_ClockChangeStart(S3MU_Type *mu);
233 status_t ELE_BaseAPI_ClockChangeFinish(S3MU_Type *mu, uint8_t NewClockRateELE, uint8_t NewClockRate…
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1182/drivers/
Dfsl_ele_base_api.c26 static status_t nvm_storage_handle_req_baseapi(S3MU_Type *mu, uint32_t *buf, uint32_t wordCount) in nvm_storage_handle_req_baseapi() argument
43 static status_t ele_mu_get_response_baseapi(S3MU_Type *mu, uint32_t *buf) in ele_mu_get_response_baseapi() argument
51 status = S3MU_GetResponse(mu, rmsg); in ele_mu_get_response_baseapi()
64 status = nvm_storage_handle_req_baseapi(mu, rmsg, msg->hdr_byte.size); in ele_mu_get_response_baseapi()
91 status_t ELE_BaseAPI_Ping(S3MU_Type *mu) in ELE_BaseAPI_Ping() argument
100 status = S3MU_SendMessage(mu, tmsg, PING_SIZE); in ELE_BaseAPI_Ping()
107 status = ele_mu_get_response_baseapi(mu, rmsg); in ELE_BaseAPI_Ping()
135 status_t ELE_BaseAPI_GetFwVersion(S3MU_Type *mu, uint32_t *EleFwVersion) in ELE_BaseAPI_GetFwVersion() argument
144 status = S3MU_SendMessage(mu, tmsg, GET_FW_VERSION_SIZE); in ELE_BaseAPI_GetFwVersion()
151 status = ele_mu_get_response_baseapi(mu, rmsg); in ELE_BaseAPI_GetFwVersion()
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Dfsl_ele_base_api.h114 status_t ELE_BaseAPI_Ping(S3MU_Type *mu);
127 status_t ELE_BaseAPI_GetFwVersion(S3MU_Type *mu, uint32_t *EleFwVersion);
140 status_t ELE_BaseAPI_GetFwStatus(S3MU_Type *mu, uint32_t *EleFwStatus);
152 status_t ELE_BaseAPI_EnableAPC(S3MU_Type *mu);
169 status_t ELE_BaseAPI_ForwardLifecycle(S3MU_Type *mu, uint32_t Lifecycle);
185 status_t ELE_BaseAPI_ReleaseRDC(S3MU_Type *mu, uint32_t RdcID, uint32_t CoreID);
197 status_t ELE_BaseAPI_StartRng(S3MU_Type *mu);
209 status_t ELE_BaseAPI_EnableOtfad(S3MU_Type *mu, uint8_t OtfadID);
219 status_t ELE_BaseAPI_ClockChangeStart(S3MU_Type *mu);
233 status_t ELE_BaseAPI_ClockChangeFinish(S3MU_Type *mu, uint8_t NewClockRateELE, uint8_t NewClockRate…
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1187/drivers/
Dfsl_ele_base_api.c26 static status_t nvm_storage_handle_req_baseapi(S3MU_Type *mu, uint32_t *buf, uint32_t wordCount) in nvm_storage_handle_req_baseapi() argument
43 static status_t ele_mu_get_response_baseapi(S3MU_Type *mu, uint32_t *buf) in ele_mu_get_response_baseapi() argument
51 status = S3MU_GetResponse(mu, rmsg); in ele_mu_get_response_baseapi()
64 status = nvm_storage_handle_req_baseapi(mu, rmsg, msg->hdr_byte.size); in ele_mu_get_response_baseapi()
91 status_t ELE_BaseAPI_Ping(S3MU_Type *mu) in ELE_BaseAPI_Ping() argument
100 status = S3MU_SendMessage(mu, tmsg, PING_SIZE); in ELE_BaseAPI_Ping()
107 status = ele_mu_get_response_baseapi(mu, rmsg); in ELE_BaseAPI_Ping()
135 status_t ELE_BaseAPI_GetFwVersion(S3MU_Type *mu, uint32_t *EleFwVersion) in ELE_BaseAPI_GetFwVersion() argument
144 status = S3MU_SendMessage(mu, tmsg, GET_FW_VERSION_SIZE); in ELE_BaseAPI_GetFwVersion()
151 status = ele_mu_get_response_baseapi(mu, rmsg); in ELE_BaseAPI_GetFwVersion()
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Dfsl_ele_base_api.h114 status_t ELE_BaseAPI_Ping(S3MU_Type *mu);
127 status_t ELE_BaseAPI_GetFwVersion(S3MU_Type *mu, uint32_t *EleFwVersion);
140 status_t ELE_BaseAPI_GetFwStatus(S3MU_Type *mu, uint32_t *EleFwStatus);
152 status_t ELE_BaseAPI_EnableAPC(S3MU_Type *mu);
169 status_t ELE_BaseAPI_ForwardLifecycle(S3MU_Type *mu, uint32_t Lifecycle);
185 status_t ELE_BaseAPI_ReleaseRDC(S3MU_Type *mu, uint32_t RdcID, uint32_t CoreID);
197 status_t ELE_BaseAPI_StartRng(S3MU_Type *mu);
209 status_t ELE_BaseAPI_EnableOtfad(S3MU_Type *mu, uint8_t OtfadID);
219 status_t ELE_BaseAPI_ClockChangeStart(S3MU_Type *mu);
233 status_t ELE_BaseAPI_ClockChangeFinish(S3MU_Type *mu, uint8_t NewClockRateELE, uint8_t NewClockRate…
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/hal_nxp-latest/mcux/mcux-sdk/drivers/s3mu/
Dfsl_s3mu.c35 static void s3mu_hal_send_data(S3MU_Type *mu, uint32_t regid, uint32_t *data);
36 static void s3mu_hal_receive_data(S3MU_Type *mu, uint32_t regid, uint32_t *data);
37 static status_t s3mu_read_data_wait(S3MU_Type *mu, uint32_t *buf, uint8_t *size, uint32_t wait);
38 static status_t s3mu_hal_receive_data_wait(S3MU_Type *mu, uint8_t regid, uint32_t *data, uint32_t w…
55 status_t S3MU_SendMessage(S3MU_Type *mu, void *buf, size_t wordCount) in S3MU_SendMessage() argument
69 s3mu_hal_send_data(mu, tx_reg_idx, (uint32_t*)buf+counter); in S3MU_SendMessage()
80 static void s3mu_hal_send_data(S3MU_Type *mu, uint32_t regid, uint32_t *data) in s3mu_hal_send_data() argument
83 while ((mu->TSR & mask) == 0u) in s3mu_hal_send_data()
86 mu->TR[regid] = *data; in s3mu_hal_send_data()
101 status_t S3MU_GetResponse(S3MU_Type *mu, void *buf) in S3MU_GetResponse() argument
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Dfsl_s3mu.h82 status_t S3MU_SendMessage(S3MU_Type *mu, void *buf, size_t wordCount);
98 status_t S3MU_GetResponse(S3MU_Type *mu, void *buf);
114 status_t S3MU_WaitForData(S3MU_Type *mu, uint32_t *buf, size_t wordCount, uint32_t wait);
129 status_t S3MU_ReadMessage(S3MU_Type *mu, uint32_t *buf, size_t *size, uint8_t read_header);
138 void S3MU_Init(S3MU_Type *mu);
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD7/drivers/upower/
Dupower_api.c143 static struct MU_tag* mu; variable
249 (mu->TSR.R == UPWR_MU_TSR_EMPTY)) { /* ... Tx registers empty: */ in upwr_txrx_isr()
252 mu->TCR.R = 0U; /* disable the tx interrupts */ in upwr_txrx_isr()
253 mu->FCR.B.F0 = 0U; /* urgency flag off, in case it was set */ in upwr_txrx_isr()
259 if (mu->RSR.R != 0UL) { /* Rx ISR occurred */ in upwr_txrx_isr()
261 mu->RCR.R = 0U; /* disable the interrupt until data is read */ in upwr_txrx_isr()
578 mu = muptr; in upwr_init()
579 mu->TCR.R = mu->RCR.R = 0U; /* disable tx and rx interrupts, in case in upwr_init()
625 if (mu->FSR.B.F0 != 0U) { /* init message already received: in upwr_init()
635 if (mu->RSR.B.RF0 != 0U) { /* first clean any Rx message left over */ in upwr_init()
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD5/drivers/upower/
Dupower_api.c143 static struct MU_tag* mu; variable
249 (mu->TSR.R == UPWR_MU_TSR_EMPTY)) { /* ... Tx registers empty: */ in upwr_txrx_isr()
252 mu->TCR.R = 0U; /* disable the tx interrupts */ in upwr_txrx_isr()
253 mu->FCR.B.F0 = 0U; /* urgency flag off, in case it was set */ in upwr_txrx_isr()
259 if (mu->RSR.R != 0UL) { /* Rx ISR occurred */ in upwr_txrx_isr()
261 mu->RCR.R = 0U; /* disable the interrupt until data is read */ in upwr_txrx_isr()
578 mu = muptr; in upwr_init()
579 mu->TCR.R = mu->RCR.R = 0U; /* disable tx and rx interrupts, in case in upwr_init()
625 if (mu->FSR.B.F0 != 0U) { /* init message already received: in upwr_init()
635 if (mu->RSR.B.RF0 != 0U) { /* first clean any Rx message left over */ in upwr_init()
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US5/drivers/upower/
Dupower_api.c143 static struct MU_tag* mu; variable
249 (mu->TSR.R == UPWR_MU_TSR_EMPTY)) { /* ... Tx registers empty: */ in upwr_txrx_isr()
252 mu->TCR.R = 0U; /* disable the tx interrupts */ in upwr_txrx_isr()
253 mu->FCR.B.F0 = 0U; /* urgency flag off, in case it was set */ in upwr_txrx_isr()
259 if (mu->RSR.R != 0UL) { /* Rx ISR occurred */ in upwr_txrx_isr()
261 mu->RCR.R = 0U; /* disable the interrupt until data is read */ in upwr_txrx_isr()
578 mu = muptr; in upwr_init()
579 mu->TCR.R = mu->RCR.R = 0U; /* disable tx and rx interrupts, in case in upwr_init()
625 if (mu->FSR.B.F0 != 0U) { /* init message already received: in upwr_init()
635 if (mu->RSR.B.RF0 != 0U) { /* first clean any Rx message left over */ in upwr_init()
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8US3/drivers/upower/
Dupower_api.c143 static struct MU_tag* mu; variable
249 (mu->TSR.R == UPWR_MU_TSR_EMPTY)) { /* ... Tx registers empty: */ in upwr_txrx_isr()
252 mu->TCR.R = 0U; /* disable the tx interrupts */ in upwr_txrx_isr()
253 mu->FCR.B.F0 = 0U; /* urgency flag off, in case it was set */ in upwr_txrx_isr()
259 if (mu->RSR.R != 0UL) { /* Rx ISR occurred */ in upwr_txrx_isr()
261 mu->RCR.R = 0U; /* disable the interrupt until data is read */ in upwr_txrx_isr()
578 mu = muptr; in upwr_init()
579 mu->TCR.R = mu->RCR.R = 0U; /* disable tx and rx interrupts, in case in upwr_init()
625 if (mu->FSR.B.F0 != 0U) { /* init message already received: in upwr_init()
635 if (mu->RSR.B.RF0 != 0U) { /* first clean any Rx message left over */ in upwr_init()
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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8UD3/drivers/upower/
Dupower_api.c143 static struct MU_tag* mu; variable
249 (mu->TSR.R == UPWR_MU_TSR_EMPTY)) { /* ... Tx registers empty: */ in upwr_txrx_isr()
252 mu->TCR.R = 0U; /* disable the tx interrupts */ in upwr_txrx_isr()
253 mu->FCR.B.F0 = 0U; /* urgency flag off, in case it was set */ in upwr_txrx_isr()
259 if (mu->RSR.R != 0UL) { /* Rx ISR occurred */ in upwr_txrx_isr()
261 mu->RCR.R = 0U; /* disable the interrupt until data is read */ in upwr_txrx_isr()
578 mu = muptr; in upwr_init()
579 mu->TCR.R = mu->RCR.R = 0U; /* disable tx and rx interrupts, in case in upwr_init()
625 if (mu->FSR.B.F0 != 0U) { /* init message already received: in upwr_init()
635 if (mu->RSR.B.RF0 != 0U) { /* first clean any Rx message left over */ in upwr_init()
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/hal_nxp-latest/mcux/mcux-sdk/CMSIS/DSP/Source/FilteringFunctions/
Darm_lms_f32.c178 float32_t mu = S->mu; /* Adaptive factor */ in arm_lms_f32() local
252 w = e * mu; in arm_lms_f32()
350 float32_t mu = S->mu; /* Adaptive factor */ in arm_lms_f32() local
428 w = e * mu; in arm_lms_f32()
Darm_lms_norm_f32.c172 float32_t mu = S->mu; /* Adaptive factor */ in arm_lms_norm_f32() local
260 w = (e * mu) / (energy + 0.000000119209289f); in arm_lms_norm_f32()
361 float32_t mu = S->mu; /* Adaptive factor */ in arm_lms_norm_f32() local
452 w = (e * mu) / (energy + 0.000000119209289f); in arm_lms_norm_f32()
Darm_lms_init_f32.c60 float32_t mu, in arm_lms_init_f32() argument
76 S->mu = mu; in arm_lms_init_f32()
Darm_lms_norm_init_f32.c65 float32_t mu, in arm_lms_norm_init_f32() argument
81 S->mu = mu; in arm_lms_norm_init_f32()
Darm_lms_init_q15.c67 q15_t mu, in arm_lms_init_q15() argument
84 S->mu = mu; in arm_lms_init_q15()
Darm_lms_init_q31.c67 q31_t mu, in arm_lms_init_q31() argument
84 S->mu = mu; in arm_lms_init_q31()
Darm_lms_norm_init_q15.c64 q15_t mu, in arm_lms_norm_init_q15() argument
84 S->mu = mu; in arm_lms_norm_init_q15()
/hal_nxp-latest/mcux/mcux-sdk/CMSIS/DSP/Include/dsp/
Dfiltering_functions.h1476 float32_t mu; /**< step size that controls filter coefficient updates. */ member
1512 float32_t mu,
1524 q15_t mu; /**< step size that controls filter coefficient updates. */ member
1544 q15_t mu,
1575 q31_t mu; /**< step size that controls filter coefficient updates. */ member
1613 q31_t mu,
1626 float32_t mu; /**< step size that control filter coefficient updates. */ member
1664 float32_t mu,
1676 q31_t mu; /**< step size that controls filter coefficient updates. */ member
1717 q31_t mu,
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