Searched refs:mclkOutputEnable (Results 1 – 2 of 2) sorted by relevance
217 … bool mclkOutputEnable; /*!< Master clock output enable, true means master clock divider enabled */ member329 bool mclkOutputEnable; /*!< master clock output enable */ member
927 base->MCR = (val | I2S_MCR_MOE(config->mclkOutputEnable)); in SAI_SetMasterClockConfig()933 if (config->mclkOutputEnable) in SAI_SetMasterClockConfig()
