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Searched refs:kXSPI_Command_DDR (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/components/flash/mflash/mimxrt700/
Dmflash_drv.c84 XSPI_LUT_SEQ(kXSPI_Command_DDR, kXSPI_8PAD, 0xEE, kXSPI_Command_DDR, kXSPI_8PAD, 0x11),
97 XSPI_LUT_SEQ(kXSPI_Command_DDR, kXSPI_8PAD, 0x05, kXSPI_Command_DDR, kXSPI_8PAD, 0xFA),
110 XSPI_LUT_SEQ(kXSPI_Command_DDR, kXSPI_8PAD, 0x06, kXSPI_Command_DDR, kXSPI_8PAD, 0xF9),
114 XSPI_LUT_SEQ(kXSPI_Command_DDR, kXSPI_8PAD, 0x9F, kXSPI_Command_DDR, kXSPI_8PAD, 0x60),
126 XSPI_LUT_SEQ(kXSPI_Command_DDR, kXSPI_8PAD, 0x21, kXSPI_Command_DDR, kXSPI_8PAD, 0xDE),
140 XSPI_LUT_SEQ(kXSPI_Command_DDR, kXSPI_8PAD, 0x12, kXSPI_Command_DDR, kXSPI_8PAD, 0xED),
146 XSPI_LUT_SEQ(kXSPI_Command_DDR, kXSPI_8PAD, 0x60, kXSPI_Command_DDR, kXSPI_8PAD, 0x9F),
/hal_nxp-latest/mcux/mcux-sdk/boards/mimxrt700evk/project_template/
Dboard.c371 … [5 * HYPERRAM_CMD_LUT_SEQ_IDX_BURST_READ] = XSPI_LUT_SEQ(kXSPI_Command_DDR, kXSPI_8PAD, 0xA0, in BOARD_Init16bitsPsRam()
379 … [5 * HYPERRAM_CMD_LUT_SEQ_IDX_BURST_WRITE + 0] = XSPI_LUT_SEQ(kXSPI_Command_DDR, kXSPI_8PAD, 0x20, in BOARD_Init16bitsPsRam()
386 [5 * HYPERRAM_CMD_LUT_SEQ_IDX_REG_READ] = XSPI_LUT_SEQ(kXSPI_Command_DDR, kXSPI_8PAD, 0xE0, in BOARD_Init16bitsPsRam()
394 [5 * HYPERRAM_CMD_LUT_SEQ_IDX_REG_WRITE] = XSPI_LUT_SEQ(kXSPI_Command_DDR, kXSPI_8PAD, 0x60, in BOARD_Init16bitsPsRam()
402 … [5 * HYPERRAM_CMD_LUT_SEQ_IDX_BURST_READ] = XSPI_LUT_SEQ(kXSPI_Command_DDR, kXSPI_8PAD, 0xA0, in BOARD_Init16bitsPsRam()
410 … [5 * HYPERRAM_CMD_LUT_SEQ_IDX_BURST_WRITE] = XSPI_LUT_SEQ(kXSPI_Command_DDR, kXSPI_8PAD, 0x20, in BOARD_Init16bitsPsRam()
418 [5 * HYPERRAM_CMD_LUT_SEQ_IDX_REG_READ] = XSPI_LUT_SEQ(kXSPI_Command_DDR, kXSPI_8PAD, 0xE0, in BOARD_Init16bitsPsRam()
426 [5 * HYPERRAM_CMD_LUT_SEQ_IDX_REG_WRITE] = XSPI_LUT_SEQ(kXSPI_Command_DDR, kXSPI_8PAD, 0x60, in BOARD_Init16bitsPsRam()
434 …AM_CMD_LUT_SEQ_IDX_RESET + 0] = XSPI_LUT_SEQ(kXSPI_Command_DDR, kXSPI_8PAD, 0xFF, kXSPI_Comman… in BOARD_Init16bitsPsRam()
/hal_nxp-latest/mcux/mcux-sdk/components/flash/nor/xspi/
Dfsl_xspi_nor_flash.c27 {kXSPI_Command_DDR, kXSPI_Command_RADDR_DDR, kXSPI_Command_CADDR_DDR, kXSPI_Command_READ_DDR,
138 … XSPI_LUT_SEQ(kXSPI_Command_DDR, kXSPI_8PAD, 0x5AU, kXSPI_Command_DDR, kXSPI_8PAD, 0xA5U), in XSPI_NOR_ProbeNorFlashSfdpHeader()
146 XSPI_LUT_SEQ(kXSPI_Command_DDR, kXSPI_8PAD, 0x5A, kXSPI_Command_DDR, kXSPI_8PAD, 0x5A), in XSPI_NOR_ProbeNorFlashSfdpHeader()
154 XSPI_LUT_SEQ(kXSPI_Command_DDR, kXSPI_8PAD, 0x5A, kXSPI_Command_DDR, kXSPI_8PAD, 0x5A), in XSPI_NOR_ProbeNorFlashSfdpHeader()
163 XSPI_LUT_SEQ(kXSPI_Command_DDR, kXSPI_8PAD, 0x5A, kXSPI_Command_DDR, kXSPI_8PAD, 0xA5), in XSPI_NOR_ProbeNorFlashSfdpHeader()
/hal_nxp-latest/mcux/mcux-sdk/drivers/xspi/
Dfsl_xspi.h81 kXSPI_Command_DDR = 0x11U, /*!< Transmit Command code to Flash, using DDR mode. */ enumerator