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Searched refs:kXBARA1_OutputDec2Phasea (Results 1 – 12 of 12) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h1045 …kXBARA1_OutputDec2Phasea = 113|0x100U, /**< XBARA1_OUT113 output assigned to DEC2_PHASEA */ enumerator
DMIMXRT1175_cm7.h1048 …kXBARA1_OutputDec2Phasea = 113|0x100U, /**< XBARA1_OUT113 output assigned to DEC2_PHASEA */ enumerator
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h1046 …kXBARA1_OutputDec2Phasea = 113|0x100U, /**< XBARA1_OUT113 output assigned to DEC2_PHASEA */ enumerator
DMIMXRT1165_cm4.h1043 …kXBARA1_OutputDec2Phasea = 113|0x100U, /**< XBARA1_OUT113 output assigned to DEC2_PHASEA */ enumerator
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h1048 …kXBARA1_OutputDec2Phasea = 113|0x100U, /**< XBARA1_OUT113 output assigned to DEC2_PHASEA */ enumerator
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h1049 …kXBARA1_OutputDec2Phasea = 113|0x100U, /**< XBARA1_OUT113 output assigned to DEC2_PHASEA */ enumerator
DMIMXRT1166_cm7.h1052 …kXBARA1_OutputDec2Phasea = 113|0x100U, /**< XBARA1_OUT113 output assigned to DEC2_PHASEA */ enumerator
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h1048 …kXBARA1_OutputDec2Phasea = 113|0x100U, /**< XBARA1_OUT113 output assigned to DEC2_PHASEA */ enumerator
DMIMXRT1173_cm7.h1051 …kXBARA1_OutputDec2Phasea = 113|0x100U, /**< XBARA1_OUT113 output assigned to DEC2_PHASEA */ enumerator
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h1054 …kXBARA1_OutputDec2Phasea = 113|0x100U, /**< XBARA1_OUT113 output assigned to DEC2_PHASEA */ enumerator
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h1054 …kXBARA1_OutputDec2Phasea = 113|0x100U, /**< XBARA1_OUT113 output assigned to DEC2_PHASEA */ enumerator
DMIMXRT1176_cm4.h1051 …kXBARA1_OutputDec2Phasea = 113|0x100U, /**< XBARA1_OUT113 output assigned to DEC2_PHASEA */ enumerator