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Searched refs:kSPI_Ssel0 (Results 1 – 25 of 53) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/template/
DRTE_Device.h274 #define RTE_SPI0_SSEL_NUM kSPI_Ssel0
282 #define RTE_SPI1_SSEL_NUM kSPI_Ssel0
290 #define RTE_SPI2_SSEL_NUM kSPI_Ssel0
298 #define RTE_SPI3_SSEL_NUM kSPI_Ssel0
306 #define RTE_SPI4_SSEL_NUM kSPI_Ssel0
314 #define RTE_SPI5_SSEL_NUM kSPI_Ssel0
322 #define RTE_SPI6_SSEL_NUM kSPI_Ssel0
330 #define RTE_SPI7_SSEL_NUM kSPI_Ssel0
338 #define RTE_SPI8_SSEL_NUM kSPI_Ssel0
346 #define RTE_SPI9_SSEL_NUM kSPI_Ssel0
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/template/
DRTE_Device.h274 #define RTE_SPI0_SSEL_NUM kSPI_Ssel0
282 #define RTE_SPI1_SSEL_NUM kSPI_Ssel0
290 #define RTE_SPI2_SSEL_NUM kSPI_Ssel0
298 #define RTE_SPI3_SSEL_NUM kSPI_Ssel0
306 #define RTE_SPI4_SSEL_NUM kSPI_Ssel0
314 #define RTE_SPI5_SSEL_NUM kSPI_Ssel0
322 #define RTE_SPI6_SSEL_NUM kSPI_Ssel0
330 #define RTE_SPI7_SSEL_NUM kSPI_Ssel0
338 #define RTE_SPI8_SSEL_NUM kSPI_Ssel0
346 #define RTE_SPI9_SSEL_NUM kSPI_Ssel0
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/template/
DRTE_Device.h274 #define RTE_SPI0_SSEL_NUM kSPI_Ssel0
282 #define RTE_SPI1_SSEL_NUM kSPI_Ssel0
290 #define RTE_SPI2_SSEL_NUM kSPI_Ssel0
298 #define RTE_SPI3_SSEL_NUM kSPI_Ssel0
306 #define RTE_SPI4_SSEL_NUM kSPI_Ssel0
314 #define RTE_SPI5_SSEL_NUM kSPI_Ssel0
322 #define RTE_SPI6_SSEL_NUM kSPI_Ssel0
330 #define RTE_SPI7_SSEL_NUM kSPI_Ssel0
338 #define RTE_SPI8_SSEL_NUM kSPI_Ssel0
346 #define RTE_SPI9_SSEL_NUM kSPI_Ssel0
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54606/template/
DRTE_Device.h202 #define RTE_SPI0_SSEL_NUM kSPI_Ssel0
210 #define RTE_SPI1_SSEL_NUM kSPI_Ssel0
218 #define RTE_SPI2_SSEL_NUM kSPI_Ssel0
226 #define RTE_SPI3_SSEL_NUM kSPI_Ssel0
234 #define RTE_SPI4_SSEL_NUM kSPI_Ssel0
242 #define RTE_SPI5_SSEL_NUM kSPI_Ssel0
250 #define RTE_SPI6_SSEL_NUM kSPI_Ssel0
258 #define RTE_SPI7_SSEL_NUM kSPI_Ssel0
266 #define RTE_SPI8_SSEL_NUM kSPI_Ssel0
274 #define RTE_SPI9_SSEL_NUM kSPI_Ssel0
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54005/template/
DRTE_Device.h201 #define RTE_SPI0_SSEL_NUM kSPI_Ssel0
209 #define RTE_SPI1_SSEL_NUM kSPI_Ssel0
217 #define RTE_SPI2_SSEL_NUM kSPI_Ssel0
225 #define RTE_SPI3_SSEL_NUM kSPI_Ssel0
233 #define RTE_SPI4_SSEL_NUM kSPI_Ssel0
241 #define RTE_SPI5_SSEL_NUM kSPI_Ssel0
249 #define RTE_SPI6_SSEL_NUM kSPI_Ssel0
257 #define RTE_SPI7_SSEL_NUM kSPI_Ssel0
265 #define RTE_SPI8_SSEL_NUM kSPI_Ssel0
273 #define RTE_SPI9_SSEL_NUM kSPI_Ssel0
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S018/template/
DRTE_Device.h201 #define RTE_SPI0_SSEL_NUM kSPI_Ssel0
209 #define RTE_SPI1_SSEL_NUM kSPI_Ssel0
217 #define RTE_SPI2_SSEL_NUM kSPI_Ssel0
225 #define RTE_SPI3_SSEL_NUM kSPI_Ssel0
233 #define RTE_SPI4_SSEL_NUM kSPI_Ssel0
241 #define RTE_SPI5_SSEL_NUM kSPI_Ssel0
249 #define RTE_SPI6_SSEL_NUM kSPI_Ssel0
257 #define RTE_SPI7_SSEL_NUM kSPI_Ssel0
265 #define RTE_SPI8_SSEL_NUM kSPI_Ssel0
273 #define RTE_SPI9_SSEL_NUM kSPI_Ssel0
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S018M/template/
DRTE_Device.h201 #define RTE_SPI0_SSEL_NUM kSPI_Ssel0
209 #define RTE_SPI1_SSEL_NUM kSPI_Ssel0
217 #define RTE_SPI2_SSEL_NUM kSPI_Ssel0
225 #define RTE_SPI3_SSEL_NUM kSPI_Ssel0
233 #define RTE_SPI4_SSEL_NUM kSPI_Ssel0
241 #define RTE_SPI5_SSEL_NUM kSPI_Ssel0
249 #define RTE_SPI6_SSEL_NUM kSPI_Ssel0
257 #define RTE_SPI7_SSEL_NUM kSPI_Ssel0
265 #define RTE_SPI8_SSEL_NUM kSPI_Ssel0
273 #define RTE_SPI9_SSEL_NUM kSPI_Ssel0
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54616/template/
DRTE_Device.h200 #define RTE_SPI0_SSEL_NUM kSPI_Ssel0
208 #define RTE_SPI1_SSEL_NUM kSPI_Ssel0
216 #define RTE_SPI2_SSEL_NUM kSPI_Ssel0
224 #define RTE_SPI3_SSEL_NUM kSPI_Ssel0
232 #define RTE_SPI4_SSEL_NUM kSPI_Ssel0
240 #define RTE_SPI5_SSEL_NUM kSPI_Ssel0
248 #define RTE_SPI6_SSEL_NUM kSPI_Ssel0
256 #define RTE_SPI7_SSEL_NUM kSPI_Ssel0
264 #define RTE_SPI8_SSEL_NUM kSPI_Ssel0
272 #define RTE_SPI9_SSEL_NUM kSPI_Ssel0
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S016/template/
DRTE_Device.h200 #define RTE_SPI0_SSEL_NUM kSPI_Ssel0
208 #define RTE_SPI1_SSEL_NUM kSPI_Ssel0
216 #define RTE_SPI2_SSEL_NUM kSPI_Ssel0
224 #define RTE_SPI3_SSEL_NUM kSPI_Ssel0
232 #define RTE_SPI4_SSEL_NUM kSPI_Ssel0
240 #define RTE_SPI5_SSEL_NUM kSPI_Ssel0
248 #define RTE_SPI6_SSEL_NUM kSPI_Ssel0
256 #define RTE_SPI7_SSEL_NUM kSPI_Ssel0
264 #define RTE_SPI8_SSEL_NUM kSPI_Ssel0
272 #define RTE_SPI9_SSEL_NUM kSPI_Ssel0
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54628/template/
DRTE_Device.h201 #define RTE_SPI0_SSEL_NUM kSPI_Ssel0
209 #define RTE_SPI1_SSEL_NUM kSPI_Ssel0
217 #define RTE_SPI2_SSEL_NUM kSPI_Ssel0
225 #define RTE_SPI3_SSEL_NUM kSPI_Ssel0
233 #define RTE_SPI4_SSEL_NUM kSPI_Ssel0
241 #define RTE_SPI5_SSEL_NUM kSPI_Ssel0
249 #define RTE_SPI6_SSEL_NUM kSPI_Ssel0
257 #define RTE_SPI7_SSEL_NUM kSPI_Ssel0
265 #define RTE_SPI8_SSEL_NUM kSPI_Ssel0
273 #define RTE_SPI9_SSEL_NUM kSPI_Ssel0
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54018/template/
DRTE_Device.h201 #define RTE_SPI0_SSEL_NUM kSPI_Ssel0
209 #define RTE_SPI1_SSEL_NUM kSPI_Ssel0
217 #define RTE_SPI2_SSEL_NUM kSPI_Ssel0
225 #define RTE_SPI3_SSEL_NUM kSPI_Ssel0
233 #define RTE_SPI4_SSEL_NUM kSPI_Ssel0
241 #define RTE_SPI5_SSEL_NUM kSPI_Ssel0
249 #define RTE_SPI6_SSEL_NUM kSPI_Ssel0
257 #define RTE_SPI7_SSEL_NUM kSPI_Ssel0
265 #define RTE_SPI8_SSEL_NUM kSPI_Ssel0
273 #define RTE_SPI9_SSEL_NUM kSPI_Ssel0
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54016/template/
DRTE_Device.h201 #define RTE_SPI0_SSEL_NUM kSPI_Ssel0
209 #define RTE_SPI1_SSEL_NUM kSPI_Ssel0
217 #define RTE_SPI2_SSEL_NUM kSPI_Ssel0
225 #define RTE_SPI3_SSEL_NUM kSPI_Ssel0
233 #define RTE_SPI4_SSEL_NUM kSPI_Ssel0
241 #define RTE_SPI5_SSEL_NUM kSPI_Ssel0
249 #define RTE_SPI6_SSEL_NUM kSPI_Ssel0
257 #define RTE_SPI7_SSEL_NUM kSPI_Ssel0
265 #define RTE_SPI8_SSEL_NUM kSPI_Ssel0
273 #define RTE_SPI9_SSEL_NUM kSPI_Ssel0
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S005/template/
DRTE_Device.h201 #define RTE_SPI0_SSEL_NUM kSPI_Ssel0
209 #define RTE_SPI1_SSEL_NUM kSPI_Ssel0
217 #define RTE_SPI2_SSEL_NUM kSPI_Ssel0
225 #define RTE_SPI3_SSEL_NUM kSPI_Ssel0
233 #define RTE_SPI4_SSEL_NUM kSPI_Ssel0
241 #define RTE_SPI5_SSEL_NUM kSPI_Ssel0
249 #define RTE_SPI6_SSEL_NUM kSPI_Ssel0
257 #define RTE_SPI7_SSEL_NUM kSPI_Ssel0
265 #define RTE_SPI8_SSEL_NUM kSPI_Ssel0
273 #define RTE_SPI9_SSEL_NUM kSPI_Ssel0
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54618/template/
DRTE_Device.h201 #define RTE_SPI0_SSEL_NUM kSPI_Ssel0
209 #define RTE_SPI1_SSEL_NUM kSPI_Ssel0
217 #define RTE_SPI2_SSEL_NUM kSPI_Ssel0
225 #define RTE_SPI3_SSEL_NUM kSPI_Ssel0
233 #define RTE_SPI4_SSEL_NUM kSPI_Ssel0
241 #define RTE_SPI5_SSEL_NUM kSPI_Ssel0
249 #define RTE_SPI6_SSEL_NUM kSPI_Ssel0
257 #define RTE_SPI7_SSEL_NUM kSPI_Ssel0
265 #define RTE_SPI8_SSEL_NUM kSPI_Ssel0
273 #define RTE_SPI9_SSEL_NUM kSPI_Ssel0
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54607/template/
DRTE_Device.h202 #define RTE_SPI0_SSEL_NUM kSPI_Ssel0
210 #define RTE_SPI1_SSEL_NUM kSPI_Ssel0
218 #define RTE_SPI2_SSEL_NUM kSPI_Ssel0
226 #define RTE_SPI3_SSEL_NUM kSPI_Ssel0
234 #define RTE_SPI4_SSEL_NUM kSPI_Ssel0
242 #define RTE_SPI5_SSEL_NUM kSPI_Ssel0
250 #define RTE_SPI6_SSEL_NUM kSPI_Ssel0
258 #define RTE_SPI7_SSEL_NUM kSPI_Ssel0
266 #define RTE_SPI8_SSEL_NUM kSPI_Ssel0
274 #define RTE_SPI9_SSEL_NUM kSPI_Ssel0
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54018M/template/
DRTE_Device.h201 #define RTE_SPI0_SSEL_NUM kSPI_Ssel0
209 #define RTE_SPI1_SSEL_NUM kSPI_Ssel0
217 #define RTE_SPI2_SSEL_NUM kSPI_Ssel0
225 #define RTE_SPI3_SSEL_NUM kSPI_Ssel0
233 #define RTE_SPI4_SSEL_NUM kSPI_Ssel0
241 #define RTE_SPI5_SSEL_NUM kSPI_Ssel0
249 #define RTE_SPI6_SSEL_NUM kSPI_Ssel0
257 #define RTE_SPI7_SSEL_NUM kSPI_Ssel0
265 #define RTE_SPI8_SSEL_NUM kSPI_Ssel0
273 #define RTE_SPI9_SSEL_NUM kSPI_Ssel0
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54605/template/
DRTE_Device.h202 #define RTE_SPI0_SSEL_NUM kSPI_Ssel0
210 #define RTE_SPI1_SSEL_NUM kSPI_Ssel0
218 #define RTE_SPI2_SSEL_NUM kSPI_Ssel0
226 #define RTE_SPI3_SSEL_NUM kSPI_Ssel0
234 #define RTE_SPI4_SSEL_NUM kSPI_Ssel0
242 #define RTE_SPI5_SSEL_NUM kSPI_Ssel0
250 #define RTE_SPI6_SSEL_NUM kSPI_Ssel0
258 #define RTE_SPI7_SSEL_NUM kSPI_Ssel0
266 #define RTE_SPI8_SSEL_NUM kSPI_Ssel0
274 #define RTE_SPI9_SSEL_NUM kSPI_Ssel0
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54608/template/
DRTE_Device.h201 #define RTE_SPI0_SSEL_NUM kSPI_Ssel0
209 #define RTE_SPI1_SSEL_NUM kSPI_Ssel0
217 #define RTE_SPI2_SSEL_NUM kSPI_Ssel0
225 #define RTE_SPI3_SSEL_NUM kSPI_Ssel0
233 #define RTE_SPI4_SSEL_NUM kSPI_Ssel0
241 #define RTE_SPI5_SSEL_NUM kSPI_Ssel0
249 #define RTE_SPI6_SSEL_NUM kSPI_Ssel0
257 #define RTE_SPI7_SSEL_NUM kSPI_Ssel0
265 #define RTE_SPI8_SSEL_NUM kSPI_Ssel0
273 #define RTE_SPI9_SSEL_NUM kSPI_Ssel0
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/template/
DRTE_Device.h168 #define RTE_SPI0_SSEL_NUM kSPI_Ssel0
176 #define RTE_SPI1_SSEL_NUM kSPI_Ssel0
184 #define RTE_SPI2_SSEL_NUM kSPI_Ssel0
192 #define RTE_SPI3_SSEL_NUM kSPI_Ssel0
200 #define RTE_SPI4_SSEL_NUM kSPI_Ssel0
208 #define RTE_SPI5_SSEL_NUM kSPI_Ssel0
216 #define RTE_SPI6_SSEL_NUM kSPI_Ssel0
224 #define RTE_SPI7_SSEL_NUM kSPI_Ssel0
232 #define RTE_SPI14_SSEL_NUM kSPI_Ssel0
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/template/
DRTE_Device.h168 #define RTE_SPI0_SSEL_NUM kSPI_Ssel0
176 #define RTE_SPI1_SSEL_NUM kSPI_Ssel0
184 #define RTE_SPI2_SSEL_NUM kSPI_Ssel0
192 #define RTE_SPI3_SSEL_NUM kSPI_Ssel0
200 #define RTE_SPI4_SSEL_NUM kSPI_Ssel0
208 #define RTE_SPI5_SSEL_NUM kSPI_Ssel0
216 #define RTE_SPI6_SSEL_NUM kSPI_Ssel0
224 #define RTE_SPI7_SSEL_NUM kSPI_Ssel0
232 #define RTE_SPI14_SSEL_NUM kSPI_Ssel0
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC54113/template/
DRTE_Device.h168 #define RTE_SPI0_SSEL_NUM kSPI_Ssel0
176 #define RTE_SPI1_SSEL_NUM kSPI_Ssel0
184 #define RTE_SPI2_SSEL_NUM kSPI_Ssel0
192 #define RTE_SPI3_SSEL_NUM kSPI_Ssel0
200 #define RTE_SPI4_SSEL_NUM kSPI_Ssel0
208 #define RTE_SPI5_SSEL_NUM kSPI_Ssel0
216 #define RTE_SPI6_SSEL_NUM kSPI_Ssel0
224 #define RTE_SPI7_SSEL_NUM kSPI_Ssel0
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5516/template/
DRTE_Device.h167 #define RTE_SPI0_SSEL_NUM kSPI_Ssel0
175 #define RTE_SPI1_SSEL_NUM kSPI_Ssel0
183 #define RTE_SPI2_SSEL_NUM kSPI_Ssel0
191 #define RTE_SPI3_SSEL_NUM kSPI_Ssel0
199 #define RTE_SPI4_SSEL_NUM kSPI_Ssel0
207 #define RTE_SPI5_SSEL_NUM kSPI_Ssel0
215 #define RTE_SPI6_SSEL_NUM kSPI_Ssel0
223 #define RTE_SPI7_SSEL_NUM kSPI_Ssel0
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5502/template/
DRTE_Device.h167 #define RTE_SPI0_SSEL_NUM kSPI_Ssel0
175 #define RTE_SPI1_SSEL_NUM kSPI_Ssel0
183 #define RTE_SPI2_SSEL_NUM kSPI_Ssel0
191 #define RTE_SPI3_SSEL_NUM kSPI_Ssel0
199 #define RTE_SPI4_SSEL_NUM kSPI_Ssel0
207 #define RTE_SPI5_SSEL_NUM kSPI_Ssel0
215 #define RTE_SPI6_SSEL_NUM kSPI_Ssel0
223 #define RTE_SPI7_SSEL_NUM kSPI_Ssel0
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5506CPXXXX/template/
DRTE_Device.h167 #define RTE_SPI0_SSEL_NUM kSPI_Ssel0
175 #define RTE_SPI1_SSEL_NUM kSPI_Ssel0
183 #define RTE_SPI2_SSEL_NUM kSPI_Ssel0
191 #define RTE_SPI3_SSEL_NUM kSPI_Ssel0
199 #define RTE_SPI4_SSEL_NUM kSPI_Ssel0
207 #define RTE_SPI5_SSEL_NUM kSPI_Ssel0
215 #define RTE_SPI6_SSEL_NUM kSPI_Ssel0
223 #define RTE_SPI7_SSEL_NUM kSPI_Ssel0
/hal_nxp-latest/mcux/mcux-sdk/devices/LPC5512/template/
DRTE_Device.h167 #define RTE_SPI0_SSEL_NUM kSPI_Ssel0
175 #define RTE_SPI1_SSEL_NUM kSPI_Ssel0
183 #define RTE_SPI2_SSEL_NUM kSPI_Ssel0
191 #define RTE_SPI3_SSEL_NUM kSPI_Ssel0
199 #define RTE_SPI4_SSEL_NUM kSPI_Ssel0
207 #define RTE_SPI5_SSEL_NUM kSPI_Ssel0
215 #define RTE_SPI6_SSEL_NUM kSPI_Ssel0
223 #define RTE_SPI7_SSEL_NUM kSPI_Ssel0

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