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Searched refs:kCLOCK_DivPLLFRGClk (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/boards/evkmimxrt595/
Dclock_config.c232 CLOCK_SetClkDiv(kCLOCK_DivPLLFRGClk, 11U); /* Set FRGPLLCLKDIV divider to value 11 */ in BOARD_BootClockRUN()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/drivers/
Dfsl_clock.h981 …kCLOCK_DivPLLFRGClk = CLKCTL1_TUPLE_MUXA(FRGPLLCLKDIV_OFFSET, 0), /*!< P L L F R G Clk Divi… enumerator
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/drivers/
Dfsl_clock.h981 …kCLOCK_DivPLLFRGClk = CLKCTL1_TUPLE_MUXA(FRGPLLCLKDIV_OFFSET, 0), /*!< P L L F R G Clk Divi… enumerator
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/drivers/
Dfsl_clock.h981 …kCLOCK_DivPLLFRGClk = CLKCTL1_TUPLE_MUXA(FRGPLLCLKDIV_OFFSET, 0), /*!< P L L F R G Clk Divi… enumerator