| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/drivers/ |
| D | fsl_clock.c | 615 ANATOP_PllBypass(kAI_Itf_1g, bypass); in CLOCK_SetPllBypass() 678 if (itf != kAI_Itf_1g) in ANATOP_PllConfigure() 691 if (itf != kAI_Itf_1g) in ANATOP_PllConfigure() 1136 ANATOP_PllBypass(kAI_Itf_1g, true); in CLOCK_InitSysPll1() 1146 ANATOP_PllConfigure(kAI_Itf_1g, div, numerator, 0U, denominator, in CLOCK_InitSysPll1() 1150 ANATOP_PllToggleHoldRingOff(kAI_Itf_1g, 225); in CLOCK_InitSysPll1() 1156 ANATOP_PllEnableClk(kAI_Itf_1g, true); in CLOCK_InitSysPll1() 1165 ANATOP_PllBypass(kAI_Itf_1g, false); in CLOCK_InitSysPll1() 1174 ANATOP_PllEnableClk(kAI_Itf_1g, false); in CLOCK_DeinitSysPll1() 1175 ANATOP_PllSetPower(kAI_Itf_1g, false); in CLOCK_DeinitSysPll1() [all …]
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| D | fsl_anatop_ai.h | 29 kAI_Itf_1g = 1, /*!< 1G PLL ITF. */ enumerator
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| D | fsl_anatop_ai.c | 52 case kAI_Itf_1g: in ANATOP_AI_Access()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/drivers/ |
| D | fsl_clock.c | 615 ANATOP_PllBypass(kAI_Itf_1g, bypass); in CLOCK_SetPllBypass() 678 if (itf != kAI_Itf_1g) in ANATOP_PllConfigure() 691 if (itf != kAI_Itf_1g) in ANATOP_PllConfigure() 1136 ANATOP_PllBypass(kAI_Itf_1g, true); in CLOCK_InitSysPll1() 1146 ANATOP_PllConfigure(kAI_Itf_1g, div, numerator, 0U, denominator, in CLOCK_InitSysPll1() 1150 ANATOP_PllToggleHoldRingOff(kAI_Itf_1g, 225); in CLOCK_InitSysPll1() 1156 ANATOP_PllEnableClk(kAI_Itf_1g, true); in CLOCK_InitSysPll1() 1165 ANATOP_PllBypass(kAI_Itf_1g, false); in CLOCK_InitSysPll1() 1174 ANATOP_PllEnableClk(kAI_Itf_1g, false); in CLOCK_DeinitSysPll1() 1175 ANATOP_PllSetPower(kAI_Itf_1g, false); in CLOCK_DeinitSysPll1() [all …]
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| D | fsl_anatop_ai.h | 29 kAI_Itf_1g = 1, /*!< 1G PLL ITF. */ enumerator
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| D | fsl_anatop_ai.c | 52 case kAI_Itf_1g: in ANATOP_AI_Access()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/drivers/ |
| D | fsl_clock.c | 621 ANATOP_PllBypass(kAI_Itf_1g, bypass); in CLOCK_SetPllBypass() 684 if (itf != kAI_Itf_1g) in ANATOP_PllConfigure() 697 if (itf != kAI_Itf_1g) in ANATOP_PllConfigure() 1127 ANATOP_PllBypass(kAI_Itf_1g, true); in CLOCK_InitSysPll1() 1137 ANATOP_PllConfigure(kAI_Itf_1g, div, numerator, 0U, denominator, in CLOCK_InitSysPll1() 1141 ANATOP_PllToggleHoldRingOff(kAI_Itf_1g, 225); in CLOCK_InitSysPll1() 1147 ANATOP_PllEnableClk(kAI_Itf_1g, true); in CLOCK_InitSysPll1() 1156 ANATOP_PllBypass(kAI_Itf_1g, false); in CLOCK_InitSysPll1() 1165 ANATOP_PllEnableClk(kAI_Itf_1g, false); in CLOCK_DeinitSysPll1() 1166 ANATOP_PllSetPower(kAI_Itf_1g, false); in CLOCK_DeinitSysPll1() [all …]
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| D | fsl_anatop_ai.h | 29 kAI_Itf_1g = 1, /*!< 1G PLL ITF. */ enumerator
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| D | fsl_anatop_ai.c | 52 case kAI_Itf_1g: in ANATOP_AI_Access()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/drivers/ |
| D | fsl_clock.c | 615 ANATOP_PllBypass(kAI_Itf_1g, bypass); in CLOCK_SetPllBypass() 678 if (itf != kAI_Itf_1g) in ANATOP_PllConfigure() 691 if (itf != kAI_Itf_1g) in ANATOP_PllConfigure() 1136 ANATOP_PllBypass(kAI_Itf_1g, true); in CLOCK_InitSysPll1() 1146 ANATOP_PllConfigure(kAI_Itf_1g, div, numerator, 0U, denominator, in CLOCK_InitSysPll1() 1150 ANATOP_PllToggleHoldRingOff(kAI_Itf_1g, 225); in CLOCK_InitSysPll1() 1156 ANATOP_PllEnableClk(kAI_Itf_1g, true); in CLOCK_InitSysPll1() 1165 ANATOP_PllBypass(kAI_Itf_1g, false); in CLOCK_InitSysPll1() 1174 ANATOP_PllEnableClk(kAI_Itf_1g, false); in CLOCK_DeinitSysPll1() 1175 ANATOP_PllSetPower(kAI_Itf_1g, false); in CLOCK_DeinitSysPll1() [all …]
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| D | fsl_anatop_ai.h | 29 kAI_Itf_1g = 1, /*!< 1G PLL ITF. */ enumerator
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| D | fsl_anatop_ai.c | 52 case kAI_Itf_1g: in ANATOP_AI_Access()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/drivers/ |
| D | fsl_clock.c | 615 ANATOP_PllBypass(kAI_Itf_1g, bypass); in CLOCK_SetPllBypass() 678 if (itf != kAI_Itf_1g) in ANATOP_PllConfigure() 691 if (itf != kAI_Itf_1g) in ANATOP_PllConfigure() 1136 ANATOP_PllBypass(kAI_Itf_1g, true); in CLOCK_InitSysPll1() 1146 ANATOP_PllConfigure(kAI_Itf_1g, div, numerator, 0U, denominator, in CLOCK_InitSysPll1() 1150 ANATOP_PllToggleHoldRingOff(kAI_Itf_1g, 225); in CLOCK_InitSysPll1() 1156 ANATOP_PllEnableClk(kAI_Itf_1g, true); in CLOCK_InitSysPll1() 1165 ANATOP_PllBypass(kAI_Itf_1g, false); in CLOCK_InitSysPll1() 1174 ANATOP_PllEnableClk(kAI_Itf_1g, false); in CLOCK_DeinitSysPll1() 1175 ANATOP_PllSetPower(kAI_Itf_1g, false); in CLOCK_DeinitSysPll1() [all …]
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| D | fsl_anatop_ai.h | 29 kAI_Itf_1g = 1, /*!< 1G PLL ITF. */ enumerator
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| D | fsl_anatop_ai.c | 52 case kAI_Itf_1g: in ANATOP_AI_Access()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/drivers/ |
| D | fsl_clock.c | 615 ANATOP_PllBypass(kAI_Itf_1g, bypass); in CLOCK_SetPllBypass() 678 if (itf != kAI_Itf_1g) in ANATOP_PllConfigure() 691 if (itf != kAI_Itf_1g) in ANATOP_PllConfigure() 1136 ANATOP_PllBypass(kAI_Itf_1g, true); in CLOCK_InitSysPll1() 1146 ANATOP_PllConfigure(kAI_Itf_1g, div, numerator, 0U, denominator, in CLOCK_InitSysPll1() 1150 ANATOP_PllToggleHoldRingOff(kAI_Itf_1g, 225); in CLOCK_InitSysPll1() 1156 ANATOP_PllEnableClk(kAI_Itf_1g, true); in CLOCK_InitSysPll1() 1165 ANATOP_PllBypass(kAI_Itf_1g, false); in CLOCK_InitSysPll1() 1174 ANATOP_PllEnableClk(kAI_Itf_1g, false); in CLOCK_DeinitSysPll1() 1175 ANATOP_PllSetPower(kAI_Itf_1g, false); in CLOCK_DeinitSysPll1() [all …]
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| D | fsl_anatop_ai.h | 29 kAI_Itf_1g = 1, /*!< 1G PLL ITF. */ enumerator
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| D | fsl_anatop_ai.c | 52 case kAI_Itf_1g: in ANATOP_AI_Access()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/drivers/ |
| D | fsl_clock.c | 621 ANATOP_PllBypass(kAI_Itf_1g, bypass); in CLOCK_SetPllBypass() 684 if (itf != kAI_Itf_1g) in ANATOP_PllConfigure() 697 if (itf != kAI_Itf_1g) in ANATOP_PllConfigure() 1127 ANATOP_PllBypass(kAI_Itf_1g, true); in CLOCK_InitSysPll1() 1137 ANATOP_PllConfigure(kAI_Itf_1g, div, numerator, 0U, denominator, in CLOCK_InitSysPll1() 1141 ANATOP_PllToggleHoldRingOff(kAI_Itf_1g, 225); in CLOCK_InitSysPll1() 1147 ANATOP_PllEnableClk(kAI_Itf_1g, true); in CLOCK_InitSysPll1() 1156 ANATOP_PllBypass(kAI_Itf_1g, false); in CLOCK_InitSysPll1() 1165 ANATOP_PllEnableClk(kAI_Itf_1g, false); in CLOCK_DeinitSysPll1() 1166 ANATOP_PllSetPower(kAI_Itf_1g, false); in CLOCK_DeinitSysPll1() [all …]
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| D | fsl_anatop_ai.h | 29 kAI_Itf_1g = 1, /*!< 1G PLL ITF. */ enumerator
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| D | fsl_anatop_ai.c | 52 case kAI_Itf_1g: in ANATOP_AI_Access()
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