1 /*
2 * Copyright (c) 2015, Freescale Semiconductor, Inc.
3 * Copyright 2016-2020, 2023-2024 NXP
4 * All rights reserved.
5 *
6 * SPDX-License-Identifier: BSD-3-Clause
7 */
8
9 #ifndef FSL_ACMP_H_
10 #define FSL_ACMP_H_
11
12 #include "fsl_common.h"
13
14 /*!
15 * @addtogroup acmp
16 * @{
17 */
18
19 /*******************************************************************************
20 * Definitions
21 ******************************************************************************/
22
23 /*! @name Driver version */
24 /*! @{ */
25 /*! @brief ACMP driver version 2.3.0. */
26 #define FSL_ACMP_DRIVER_VERSION (MAKE_VERSION(2, 3, 0))
27 /*! @} */
28
29 /*! @brief The mask of status flags cleared by writing 1. */
30 #define CMP_C0_CFx_MASK (CMP_C0_CFR_MASK | CMP_C0_CFF_MASK)
31
32 #if !(defined(FSL_FEATURE_ACMP_HAS_NO_ROUNDROBIN_MODE) && (FSL_FEATURE_ACMP_HAS_NO_ROUNDROBIN_MODE == 1U))
33 #define CMP_C1_CHNn_MASK 0xFF0000U /* C1_CHN0 - C1_CHN7. */
34 #define CMP_C2_CHnF_MASK 0xFF0000U /* C2_CH0F - C2_CH7F. */
35 #endif /* !(defined(FSL_FEATURE_ACMP_HAS_NO_ROUNDROBIN_MODE) && (FSL_FEATURE_ACMP_HAS_NO_ROUNDROBIN_MODE == 1U)) */
36
37 /*! @brief Interrupt enable/disable mask. */
38 enum _acmp_interrupt_enable
39 {
40 kACMP_OutputRisingInterruptEnable = (1U << 0U), /*!< Enable the interrupt when comparator outputs rising. */
41 kACMP_OutputFallingInterruptEnable = (1U << 1U), /*!< Enable the interrupt when comparator outputs falling. */
42 #if !(defined(FSL_FEATURE_ACMP_HAS_NO_ROUNDROBIN_MODE) && (FSL_FEATURE_ACMP_HAS_NO_ROUNDROBIN_MODE == 1U))
43 kACMP_RoundRobinInterruptEnable = (1U << 2U), /*!< Enable the Round-Robin interrupt. */
44 #endif /* !(defined(FSL_FEATURE_ACMP_HAS_NO_ROUNDROBIN_MODE) && (FSL_FEATURE_ACMP_HAS_NO_ROUNDROBIN_MODE == 1U)) */
45 };
46
47 /*! @brief Status flag mask. */
48 enum _acmp_status_flags
49 {
50 kACMP_OutputRisingEventFlag = CMP_C0_CFR_MASK, /*!< Rising-edge on compare output has occurred. */
51 kACMP_OutputFallingEventFlag = CMP_C0_CFF_MASK, /*!< Falling-edge on compare output has occurred. */
52 kACMP_OutputAssertEventFlag = CMP_C0_COUT_MASK, /*!< Return the current value of the analog comparator output. */
53 };
54
55 #if defined(FSL_FEATURE_ACMP_HAS_C0_OFFSET_BIT) && (FSL_FEATURE_ACMP_HAS_C0_OFFSET_BIT == 1U)
56 /*!
57 * @brief Comparator hard block offset control.
58 *
59 * If OFFSET level is 1, then there is no hysteresis in the case of positive port input crossing negative port
60 * input in the positive direction (or negative port input crossing positive port input in the negative direction).
61 * Hysteresis still exists for positive port input crossing negative port input in the falling direction.
62 * If OFFSET level is 0, then the hysteresis selected by acmp_hysteresis_mode_t is valid for both directions.
63 */
64 typedef enum _acmp_offset_mode
65 {
66 kACMP_OffsetLevel0 = 0U, /*!< The comparator hard block output has level 0 offset internally. */
67 kACMP_OffsetLevel1 = 1U, /*!< The comparator hard block output has level 1 offset internally. */
68 } acmp_offset_mode_t;
69 #endif /* FSL_FEATURE_ACMP_HAS_C0_OFFSET_BIT */
70
71 /*!
72 * @brief Comparator hard block hysteresis control.
73 *
74 * See chip data sheet to get the actual hysteresis value with each level.
75 */
76 typedef enum _acmp_hysteresis_mode
77 {
78 kACMP_HysteresisLevel0 = 0U, /*!< Offset is level 0 and Hysteresis is level 0. */
79 kACMP_HysteresisLevel1 = 1U, /*!< Offset is level 0 and Hysteresis is level 1. */
80 kACMP_HysteresisLevel2 = 2U, /*!< Offset is level 0 and Hysteresis is level 2. */
81 kACMP_HysteresisLevel3 = 3U, /*!< Offset is level 0 and Hysteresis is level 3. */
82 } acmp_hysteresis_mode_t;
83
84 /*! @brief CMP Voltage Reference source. */
85 typedef enum _acmp_reference_voltage_source
86 {
87 kACMP_VrefSourceVin1 = 0U, /*!< Vin1 is selected as resistor ladder network supply reference Vin. */
88 kACMP_VrefSourceVin2 = 1U, /*!< Vin2 is selected as resistor ladder network supply reference Vin. */
89 } acmp_reference_voltage_source_t;
90
91 #if defined(FSL_FEATURE_ACMP_HAS_C1_INPSEL_BIT) && (FSL_FEATURE_ACMP_HAS_C1_INPSEL_BIT == 1U)
92 /*! @brief Port input source. */
93 typedef enum _acmp_port_input
94 {
95 kACMP_PortInputFromDAC = 0U, /*!< Port input from the 8-bit DAC output. */
96 kACMP_PortInputFromMux = 1U, /*!< Port input from the analog 8-1 mux. */
97 } acmp_port_input_t;
98 #endif /* FSL_FEATURE_ACMP_HAS_C1_INPSEL_BIT */
99
100 #if !(defined(FSL_FEATURE_ACMP_HAS_NO_ROUNDROBIN_MODE) && (FSL_FEATURE_ACMP_HAS_NO_ROUNDROBIN_MODE == 1U))
101 /*! @brief Fixed mux port. */
102 typedef enum _acmp_fixed_port
103 {
104 kACMP_FixedPlusPort = 0U, /*!< Only the inputs to the Minus port are swept in each round. */
105 kACMP_FixedMinusPort = 1U, /*!< Only the inputs to the Plus port are swept in each round. */
106 } acmp_fixed_port_t;
107 #endif /* !(defined(FSL_FEATURE_ACMP_HAS_NO_ROUNDROBIN_MODE) && (FSL_FEATURE_ACMP_HAS_NO_ROUNDROBIN_MODE == 1U)) */
108
109 #if defined(FSL_FEATURE_ACMP_HAS_C1_DMODE_BIT) && (FSL_FEATURE_ACMP_HAS_C1_DMODE_BIT == 1U)
110 /*! @brief Internal DAC's work mode. */
111 typedef enum _acmp_dac_work_mode
112 {
113 kACMP_DACWorkLowSpeedMode = 0U, /*!< DAC is selected to work in low speed and low power mode. */
114 kACMP_DACWorkHighSpeedMode = 1U, /*!< DAC is selected to work in high speed high power mode. */
115 } acmp_dac_work_mode_t;
116 #endif /* FSL_FEATURE_ACMP_HAS_C1_DMODE_BIT */
117
118 /*! @brief Configuration for ACMP. */
119 typedef struct _acmp_config
120 {
121 #if defined(FSL_FEATURE_ACMP_HAS_C0_OFFSET_BIT) && (FSL_FEATURE_ACMP_HAS_C0_OFFSET_BIT == 1U)
122 acmp_offset_mode_t offsetMode; /*!< Offset mode. */
123 #endif /* FSL_FEATURE_ACMP_HAS_C0_OFFSET_BIT */
124 #if defined(FSL_FEATURE_ACMP_HAS_C0_HYSTCTR_BIT) && (FSL_FEATURE_ACMP_HAS_C0_HYSTCTR_BIT == 1U)
125 acmp_hysteresis_mode_t hysteresisMode; /*!< Hysteresis mode. */
126 #endif /* FSL_FEATURE_ACMP_HAS_C0_HYSTCTR_BIT */
127 bool enableHighSpeed; /*!< Enable High Speed (HS) comparison mode. */
128 bool enableInvertOutput; /*!< Enable inverted comparator output. */
129 bool useUnfilteredOutput; /*!< Set compare output(COUT) to equal COUTA(true) or COUT(false). */
130 bool enablePinOut; /*!< The comparator output is available on the associated pin. */
131 } acmp_config_t;
132
133 /*!
134 * @brief Configuration for channel.
135 *
136 * The comparator's port can be input from channel mux or DAC. If port input is from channel mux, detailed channel
137 * number for the mux should be configured.
138 */
139 typedef struct _acmp_channel_config
140 {
141 #if defined(FSL_FEATURE_ACMP_HAS_C1_INPSEL_BIT) && (FSL_FEATURE_ACMP_HAS_C1_INPSEL_BIT == 1U)
142 acmp_port_input_t positivePortInput; /*!< Input source of the comparator's positive port. */
143 #endif /* FSL_FEATURE_ACMP_HAS_C1_INPSEL_BIT */
144 uint32_t plusMuxInput; /*!< Plus mux input channel(0~7). */
145 #if defined(FSL_FEATURE_ACMP_HAS_C1_INNSEL_BIT) && (FSL_FEATURE_ACMP_HAS_C1_INNSEL_BIT == 1U)
146 acmp_port_input_t negativePortInput; /*!< Input source of the comparator's negative port. */
147 #endif /* FSL_FEATURE_ACMP_HAS_C1_INNSEL_BIT */
148 uint32_t minusMuxInput; /*!< Minus mux input channel(0~7). */
149 } acmp_channel_config_t;
150
151 /*! @brief Configuration for filter. */
152 typedef struct _acmp_filter_config
153 {
154 #if !(defined(FSL_FEATURE_ACMP_HAS_NO_C0_SE_BIT) && (FSL_FEATURE_ACMP_HAS_NO_C0_SE_BIT == 1U))
155 bool enableSample; /*!< Using external SAMPLE as sampling clock input, or using divided bus clock. */
156 #endif /* FSL_FEATURE_ACMP_HAS_NO_C0_SE_BIT */
157 uint32_t filterCount; /*!< Filter Sample Count. Available range is 1-7, 0 would cause the filter disabled. */
158 uint32_t filterPeriod; /*!< Filter Sample Period. The divider to bus clock. Available range is 0-255. */
159 } acmp_filter_config_t;
160
161 /*! @brief Configuration for DAC. */
162 typedef struct _acmp_dac_config
163 {
164 acmp_reference_voltage_source_t referenceVoltageSource; /*!< Supply voltage reference source. */
165 uint32_t DACValue; /*!< Value for DAC Output Voltage. Available range is 0-255. */
166
167 #if defined(FSL_FEATURE_ACMP_HAS_C1_DACOE_BIT) && (FSL_FEATURE_ACMP_HAS_C1_DACOE_BIT == 1U)
168 bool enableOutput; /*!< Enable the DAC output. */
169 #endif /* FSL_FEATURE_ACMP_HAS_C1_DACOE_BIT */
170
171 #if defined(FSL_FEATURE_ACMP_HAS_C1_DMODE_BIT) && (FSL_FEATURE_ACMP_HAS_C1_DMODE_BIT == 1U)
172 acmp_dac_work_mode_t workMode;
173 #endif /* FSL_FEATURE_ACMP_HAS_C1_DMODE_BIT */
174 } acmp_dac_config_t;
175
176 #if !(defined(FSL_FEATURE_ACMP_HAS_NO_ROUNDROBIN_MODE) && (FSL_FEATURE_ACMP_HAS_NO_ROUNDROBIN_MODE == 1U))
177 /*! @brief Configuration for round robin mode. */
178 typedef struct _acmp_round_robin_config
179 {
180 acmp_fixed_port_t fixedPort; /*!< Fixed mux port. */
181 uint32_t fixedChannelNumber; /*!< Indicates which channel is fixed in the fixed mux port. */
182 uint32_t checkerChannelMask; /*!< Mask of checker channel index. Available range is channel0:0x01 to channel7:0x80
183 for round-robin checker. */
184 uint32_t sampleClockCount; /*!< Specifies how many round-robin clock cycles(0~3) later the sample takes place. */
185 uint32_t delayModulus; /*!< Comparator and DAC initialization delay modulus. */
186 } acmp_round_robin_config_t;
187 #endif /* !(defined(FSL_FEATURE_ACMP_HAS_NO_ROUNDROBIN_MODE) && (FSL_FEATURE_ACMP_HAS_NO_ROUNDROBIN_MODE == 1U)) */
188
189 #if defined(FSL_FEATURE_ACMP_HAS_C3_REG) && (FSL_FEATURE_ACMP_HAS_C3_REG == 1U)
190 #if !(defined(FSL_FEATURE_ACMP_HAS_NO_3V_DOMAIN) && (FSL_FEATURE_ACMP_HAS_NO_3V_DOMAIN == 1U))
191 /*! @brief Discrete mode clock selection. */
192 typedef enum _acmp_discrete_clock_source
193 {
194 kACMP_DiscreteClockSlow = 0U, /*!< Slow clock (32kHz) is used as the discrete mode clock. */
195 kACMP_DiscreteClockFast = 1U, /*!< Fast clock (16-20MHz) is used as the discrete mode clock. */
196 } acmp_discrete_clock_source_t;
197
198 /*!
199 * @brief ACMP discrete sample selection.
200 * These values configures the analog comparator sampling timing (speicified by the discrete mode clock period T which
201 * is selected by #acmp_discrete_clock_source_t) in discrete mode.
202 */
203 typedef enum _acmp_discrete_sample_time
204 {
205 kACMP_DiscreteSampleTimeAs1T = 0U, /*!< The sampling time equals to 1xT. */
206 kACMP_DiscreteSampleTimeAs2T = 1U, /*!< The sampling time equals to 2xT. */
207 kACMP_DiscreteSampleTimeAs4T = 2U, /*!< The sampling time equals to 4xT. */
208 kACMP_DiscreteSampleTimeAs8T = 3U, /*!< The sampling time equals to 8xT. */
209 kACMP_DiscreteSampleTimeAs16T = 4U, /*!< The sampling time equals to 16xT. */
210 kACMP_DiscreteSampleTimeAs32T = 5U, /*!< The sampling time equals to 32xT. */
211 kACMP_DiscreteSampleTimeAs64T = 6U, /*!< The sampling time equals to 64xT. */
212 kACMP_DiscreteSampleTimeAs256T = 7U, /*!< The sampling time equals to 256xT. */
213 } acmp_discrete_sample_time_t;
214
215 /*!
216 * @brief ACMP discrete phase time selection.
217 * There are two phases for sampling input signals, phase 1 and phase 2.
218 */
219 typedef enum _acmp_discrete_phase_time
220 {
221 kACMP_DiscretePhaseTimeAlt0 = 0U, /*!< The phase x active in one sampling selection 0. */
222 kACMP_DiscretePhaseTimeAlt1 = 1U, /*!< The phase x active in one sampling selection 1. */
223 kACMP_DiscretePhaseTimeAlt2 = 2U, /*!< The phase x active in one sampling selection 2. */
224 kACMP_DiscretePhaseTimeAlt3 = 3U, /*!< The phase x active in one sampling selection 3. */
225 kACMP_DiscretePhaseTimeAlt4 = 4U, /*!< The phase x active in one sampling selection 4. */
226 kACMP_DiscretePhaseTimeAlt5 = 5U, /*!< The phase x active in one sampling selection 5. */
227 kACMP_DiscretePhaseTimeAlt6 = 6U, /*!< The phase x active in one sampling selection 6. */
228 kACMP_DiscretePhaseTimeAlt7 = 7U, /*!< The phase x active in one sampling selection 7. */
229 } acmp_discrete_phase_time_t;
230 #endif /* !(defined(FSL_FEATURE_ACMP_HAS_NO_3V_DOMAIN) && (FSL_FEATURE_ACMP_HAS_NO_3V_DOMAIN == 1U)) */
231
232 /*! @brief Configuration for discrete mode. */
233 typedef struct _acmp_discrete_mode_config
234 {
235 bool enablePositiveChannelDiscreteMode; /*!< Positive Channel Continuous Mode Enable. By default, the continuous
236 mode is used. */
237 bool enableNegativeChannelDiscreteMode; /*!< Negative Channel Continuous Mode Enable. By default, the continuous
238 mode is used. */
239 #if !(defined(FSL_FEATURE_ACMP_HAS_NO_3V_DOMAIN) && (FSL_FEATURE_ACMP_HAS_NO_3V_DOMAIN == 1U))
240 bool enableResistorDivider; /*!< Resistor Divider Enable is used to enable the resistor divider for the inputs when
241 they come from 3v domain and their values are above 1.8v. */
242 acmp_discrete_clock_source_t clockSource; /*!< Select the clock source in order to generate the requiried timing for
243 comparator to work in discrete mode. */
244 acmp_discrete_sample_time_t sampleTime; /*!< Select the ACMP total sampling time period. */
245 acmp_discrete_phase_time_t phase1Time; /*!< Select the ACMP phase 1 sampling time. */
246 acmp_discrete_phase_time_t phase2Time; /*!< Select the ACMP phase 2 sampling time. */
247 #endif /* !(defined(FSL_FEATURE_ACMP_HAS_NO_3V_DOMAIN) && (FSL_FEATURE_ACMP_HAS_NO_3V_DOMAIN == 1U)) */
248 } acmp_discrete_mode_config_t;
249
250 #endif /* FSL_FEATURE_ACMP_HAS_C3_REG */
251
252 #if defined(__cplusplus)
253 extern "C" {
254 #endif
255
256 /*******************************************************************************
257 * API
258 ******************************************************************************/
259
260 /*!
261 * @name Initialization and deinitialization
262 * @{
263 */
264
265 /*!
266 * @brief Initializes the ACMP.
267 *
268 * The default configuration can be got by calling ACMP_GetDefaultConfig().
269 *
270 * @param base ACMP peripheral base address.
271 * @param config Pointer to ACMP configuration structure.
272 */
273 void ACMP_Init(CMP_Type *base, const acmp_config_t *config);
274
275 /*!
276 * @brief Deinitializes the ACMP.
277 *
278 * @param base ACMP peripheral base address.
279 */
280 void ACMP_Deinit(CMP_Type *base);
281
282 /*!
283 * @brief Gets the default configuration for ACMP.
284 *
285 * This function initializes the user configuration structure to default value. The default value are:
286 *
287 * Example:
288 @code
289 config->enableHighSpeed = false;
290 config->enableInvertOutput = false;
291 config->useUnfilteredOutput = false;
292 config->enablePinOut = false;
293 config->enableHysteresisBothDirections = false;
294 config->hysteresisMode = kACMP_hysteresisMode0;
295 @endcode
296 *
297 * @param config Pointer to ACMP configuration structure.
298 */
299 void ACMP_GetDefaultConfig(acmp_config_t *config);
300
301 /*! @} */
302
303 /*!
304 * @name Basic Operations
305 * @{
306 */
307
308 /*!
309 * @brief Enables or disables the ACMP.
310 *
311 * @param base ACMP peripheral base address.
312 * @param enable True to enable the ACMP.
313 */
314 void ACMP_Enable(CMP_Type *base, bool enable);
315
316 #if defined(FSL_FEATURE_ACMP_HAS_C0_LINKEN_BIT) && (FSL_FEATURE_ACMP_HAS_C0_LINKEN_BIT == 1U)
317 /*!
318 * @brief Enables the link from CMP to DAC enable.
319 *
320 * When this bit is set, the DAC enable/disable is controlled by the bit CMP_C0[EN] instead of CMP_C1[DACEN].
321 *
322 * @param base ACMP peripheral base address.
323 * @param enable Enable the feature or not.
324 */
325 void ACMP_EnableLinkToDAC(CMP_Type *base, bool enable);
326 #endif /* FSL_FEATURE_ACMP_HAS_C0_LINKEN_BIT */
327
328 /*!
329 * @brief Sets the channel configuration.
330 *
331 * Note that the plus/minus mux's setting is only valid when the positive/negative port's input isn't from DAC but
332 * from channel mux.
333 *
334 * Example:
335 @code
336 acmp_channel_config_t configStruct = {0};
337 configStruct.positivePortInput = kACMP_PortInputFromDAC;
338 configStruct.negativePortInput = kACMP_PortInputFromMux;
339 configStruct.minusMuxInput = 1U;
340 ACMP_SetChannelConfig(CMP0, &configStruct);
341 @endcode
342 *
343 * @param base ACMP peripheral base address.
344 * @param config Pointer to channel configuration structure.
345 */
346 void ACMP_SetChannelConfig(CMP_Type *base, const acmp_channel_config_t *config);
347
348 /*! @} */
349
350 /*!
351 * @name Advanced Operations
352 * @{
353 */
354
355 /*!
356 * @brief Enables or disables DMA.
357 *
358 * @param base ACMP peripheral base address.
359 * @param enable True to enable DMA.
360 */
361 void ACMP_EnableDMA(CMP_Type *base, bool enable);
362
363 #if !(defined(FSL_FEATURE_ACMP_HAS_NO_WINDOW_MODE) && (FSL_FEATURE_ACMP_HAS_NO_WINDOW_MODE == 1U))
364 /*!
365 * @brief Enables or disables window mode.
366 *
367 * @param base ACMP peripheral base address.
368 * @param enable True to enable window mode.
369 */
370 void ACMP_EnableWindowMode(CMP_Type *base, bool enable);
371 #endif /* !(defined(FSL_FEATURE_ACMP_HAS_NO_WINDOW_MODE) && (FSL_FEATURE_ACMP_HAS_NO_WINDOW_MODE == 1U)) */
372
373 /*!
374 * @brief Configures the filter.
375 *
376 * The filter can be enabled when the filter count is bigger than 1, the filter period is greater than 0 and the sample
377 * clock is from divided bus clock or the filter is bigger than 1 and the sample clock is from external clock. Detailed
378 * usage can be got from the reference manual.
379 *
380 * Example:
381 @code
382 acmp_filter_config_t configStruct = {0};
383 configStruct.filterCount = 5U;
384 configStruct.filterPeriod = 200U;
385 configStruct.enableSample = false;
386 ACMP_SetFilterConfig(CMP0, &configStruct);
387 @endcode
388 *
389 * @param base ACMP peripheral base address.
390 * @param config Pointer to filter configuration structure.
391 */
392 void ACMP_SetFilterConfig(CMP_Type *base, const acmp_filter_config_t *config);
393
394 /*!
395 * @brief Configures the internal DAC.
396 *
397 * Example:
398 @code
399 acmp_dac_config_t configStruct = {0};
400 configStruct.referenceVoltageSource = kACMP_VrefSourceVin1;
401 configStruct.DACValue = 20U;
402 configStruct.enableOutput = false;
403 configStruct.workMode = kACMP_DACWorkLowSpeedMode;
404 ACMP_SetDACConfig(CMP0, &configStruct);
405 @endcode
406 *
407 * @param base ACMP peripheral base address.
408 * @param config Pointer to DAC configuration structure. "NULL" is for disabling the feature.
409 */
410 void ACMP_SetDACConfig(CMP_Type *base, const acmp_dac_config_t *config);
411
412 #if !(defined(FSL_FEATURE_ACMP_HAS_NO_ROUNDROBIN_MODE) && (FSL_FEATURE_ACMP_HAS_NO_ROUNDROBIN_MODE == 1U))
413 /*!
414 * @brief Configures the round robin mode.
415 *
416 * Example:
417 @code
418 acmp_round_robin_config_t configStruct = {0};
419 configStruct.fixedPort = kACMP_FixedPlusPort;
420 configStruct.fixedChannelNumber = 3U;
421 configStruct.checkerChannelMask = 0xF7U;
422 configStruct.sampleClockCount = 0U;
423 configStruct.delayModulus = 0U;
424 ACMP_SetRoundRobinConfig(CMP0, &configStruct);
425 @endcode
426 * @param base ACMP peripheral base address.
427 * @param config Pointer to round robin mode configuration structure. "NULL" is for disabling the feature.
428 */
429 void ACMP_SetRoundRobinConfig(CMP_Type *base, const acmp_round_robin_config_t *config);
430
431 /*!
432 * @brief Defines the pre-set state of channels in round robin mode.
433 *
434 * Note: The pre-state has different circuit with get-round-robin-result in the SOC even though they are same bits.
435 * So get-round-robin-result can't return the same value as the value are set by pre-state.
436 *
437 * @param base ACMP peripheral base address.
438 * @param mask Mask of round robin channel index. Available range is channel0:0x01 to channel7:0x80.
439 */
440 void ACMP_SetRoundRobinPreState(CMP_Type *base, uint32_t mask);
441
442 /*!
443 * @brief Gets the channel input changed flags in round robin mode.
444 *
445 * @param base ACMP peripheral base address.
446 * @return Mask of channel input changed asserted flags. Available range is channel0:0x01 to channel7:0x80.
447 */
ACMP_GetRoundRobinStatusFlags(CMP_Type * base)448 static inline uint32_t ACMP_GetRoundRobinStatusFlags(CMP_Type *base)
449 {
450 return (((base->C2) & CMP_C2_CHnF_MASK) >> CMP_C2_CH0F_SHIFT);
451 }
452
453 /*!
454 * @brief Clears the channel input changed flags in round robin mode.
455 *
456 * @param base ACMP peripheral base address.
457 * @param mask Mask of channel index. Available range is channel0:0x01 to channel7:0x80.
458 */
459 void ACMP_ClearRoundRobinStatusFlags(CMP_Type *base, uint32_t mask);
460
461 /*!
462 * @brief Gets the round robin result.
463 *
464 * Note that the set-pre-state has different circuit with get-round-robin-result in the SOC even though they are same
465 * bits. So ACMP_GetRoundRobinResult() can't return the same value as the value are set by ACMP_SetRoundRobinPreState.
466
467 * @param base ACMP peripheral base address.
468 * @return Mask of round robin channel result. Available range is channel0:0x01 to channel7:0x80.
469 */
ACMP_GetRoundRobinResult(CMP_Type * base)470 static inline uint32_t ACMP_GetRoundRobinResult(CMP_Type *base)
471 {
472 return ((base->C2 & CMP_C2_ACOn_MASK) >> CMP_C2_ACOn_SHIFT);
473 }
474 #endif /* !(defined(FSL_FEATURE_ACMP_HAS_NO_ROUNDROBIN_MODE) && (FSL_FEATURE_ACMP_HAS_NO_ROUNDROBIN_MODE == 1U)) */
475
476 /*! @} */
477
478 /*!
479 * @name Interrupts
480 * @{
481 */
482
483 /*!
484 * @brief Enables interrupts.
485 *
486 * @param base ACMP peripheral base address.
487 * @param mask Interrupts mask. See "_acmp_interrupt_enable".
488 */
489 void ACMP_EnableInterrupts(CMP_Type *base, uint32_t mask);
490
491 /*!
492 * @brief Disables interrupts.
493 *
494 * @param base ACMP peripheral base address.
495 * @param mask Interrupts mask. See "_acmp_interrupt_enable".
496 */
497 void ACMP_DisableInterrupts(CMP_Type *base, uint32_t mask);
498
499 /*! @} */
500
501 /*!
502 * @name Status
503 * @{
504 */
505
506 /*!
507 * @brief Gets status flags.
508 *
509 * @param base ACMP peripheral base address.
510 * @return Status flags asserted mask. See "_acmp_status_flags".
511 */
512 uint32_t ACMP_GetStatusFlags(CMP_Type *base);
513
514 /*!
515 * @brief Clears status flags.
516 *
517 * @param base ACMP peripheral base address.
518 * @param mask Status flags mask. See "_acmp_status_flags".
519 */
520 void ACMP_ClearStatusFlags(CMP_Type *base, uint32_t mask);
521
522 /*! @} */
523
524 #if defined(FSL_FEATURE_ACMP_HAS_C3_REG) && (FSL_FEATURE_ACMP_HAS_C3_REG == 1U)
525 /*!
526 * @name Discrete mode
527 * @{
528 */
529
530 /*!
531 * @brief Configure the discrete mode.
532 *
533 * Configure the discrete mode when supporting 3V domain with 1.8V core.
534 *
535 * @param base ACMP peripheral base address.
536 * @param config Pointer to configuration structure. See "acmp_discrete_mode_config_t".
537 */
538 void ACMP_SetDiscreteModeConfig(CMP_Type *base, const acmp_discrete_mode_config_t *config);
539
540 /*!
541 * @brief Get the default configuration for discrete mode setting.
542 *
543 * @param config Pointer to configuration structure to be restored with the setting values.
544 */
545 void ACMP_GetDefaultDiscreteModeConfig(acmp_discrete_mode_config_t *config);
546
547 /*! @} */
548 #endif /* FSL_FEATURE_ACMP_HAS_C3_REG */
549
550 #if defined(__cplusplus)
551 }
552 #endif
553
554 /*! @}*/
555
556 #endif /* FSL_ACMP_H_ */
557
