Searched refs:enResSRAMs (Results 1 – 7 of 7) sorted by relevance
198 static const enabled_resources_t enResSRAMs[RESC_GROUP_SRAMS_SIZE] = { variable337 enabledResources[enResSRAMs[feature].group] |= enResSRAMs[feature].mask; in PM_DEV_EnablePeripheralsDeepSleep()338 enabledResources[enResSRAMs[feature].group + 1UL] |= enResSRAMs[feature].mask; in PM_DEV_EnablePeripheralsDeepSleep()343 enabledResources[enResSRAMs[feature].group] |= enResSRAMs[feature].mask; in PM_DEV_EnablePeripheralsDeepSleep()385 PMC_PDRCFG_REG(enResSRAMs[feature].group - 1UL) &= ~enResSRAMs[feature].mask; in PM_DEV_DisablePeripheralsSleep()386 PMC_PDRCFG_REG(enResSRAMs[feature].group) &= ~enResSRAMs[feature].mask; in PM_DEV_DisablePeripheralsSleep()391 PMC_PDRCFG_REG(enResSRAMs[feature].group - 1UL) &= ~enResSRAMs[feature].mask; in PM_DEV_DisablePeripheralsSleep()393 PMC_PDRCFG_REG(enResSRAMs[feature].group) |= enResSRAMs[feature].mask; in PM_DEV_DisablePeripheralsSleep()403 PMC_PDRCFG_REG(enResSRAMs[feature].group - 1UL) |= enResSRAMs[feature].mask; in PM_DEV_DisablePeripheralsSleep()404 PMC_PDRCFG_REG(enResSRAMs[feature].group) |= enResSRAMs[feature].mask; in PM_DEV_DisablePeripheralsSleep()
179 static const uint32_t enResSRAMs[RESC_GROUP_SRAMS_SIZE] = { variable250 enabledResources[2] |= enResSRAMs[feature]; in PM_DEV_EnablePeripheralsDeepSleep()251 enabledResources[3] |= enResSRAMs[feature]; in PM_DEV_EnablePeripheralsDeepSleep()256 enabledResources[2] |= enResSRAMs[feature]; in PM_DEV_EnablePeripheralsDeepSleep()326 SYSCTL0_PDRCFGCLR_REG(2) = enResSRAMs[feature]; in PM_DEV_DisablePeripheralsSleep()327 SYSCTL0_PDRCFGCLR_REG(3) = enResSRAMs[feature]; in PM_DEV_DisablePeripheralsSleep()332 SYSCTL0_PDRCFGCLR_REG(2) = enResSRAMs[feature]; in PM_DEV_DisablePeripheralsSleep()334 SYSCTL0_PDRCFGSET_REG(3) = enResSRAMs[feature]; in PM_DEV_DisablePeripheralsSleep()340 SYSCTL0_PDRCFGSET_REG(2) = enResSRAMs[feature]; in PM_DEV_DisablePeripheralsSleep()341 SYSCTL0_PDRCFGSET_REG(3) = enResSRAMs[feature]; in PM_DEV_DisablePeripheralsSleep()
171 static const uint32_t enResSRAMs[RESC_GROUP_SRAMS_SIZE] = { variable277 enabledResources[2] |= enResSRAMs[feature]; in PM_DEV_EnablePeripheralsDeepSleep()278 enabledResources[3] |= enResSRAMs[feature]; in PM_DEV_EnablePeripheralsDeepSleep()283 enabledResources[2] |= enResSRAMs[feature]; in PM_DEV_EnablePeripheralsDeepSleep()353 SYSCTL0_PDRCFGCLR_REG(2) = enResSRAMs[feature]; in PM_DEV_DisablePeripheralsSleep()354 SYSCTL0_PDRCFGCLR_REG(3) = enResSRAMs[feature]; in PM_DEV_DisablePeripheralsSleep()359 SYSCTL0_PDRCFGCLR_REG(2) = enResSRAMs[feature]; in PM_DEV_DisablePeripheralsSleep()361 SYSCTL0_PDRCFGSET_REG(3) = enResSRAMs[feature]; in PM_DEV_DisablePeripheralsSleep()367 SYSCTL0_PDRCFGSET_REG(2) = enResSRAMs[feature]; in PM_DEV_DisablePeripheralsSleep()368 SYSCTL0_PDRCFGSET_REG(3) = enResSRAMs[feature]; in PM_DEV_DisablePeripheralsSleep()
