Home
last modified time | relevance | path

Searched refs:dw_conv_params (Results 1 – 5 of 5) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/CMSIS/NN/Source/ConvolutionFunctions/
Darm_depthwise_conv_s8.c230 const cmsis_nn_dw_conv_params *dw_conv_params, in arm_depthwise_conv_s8() argument
241 (void)dw_conv_params->dilation; in arm_depthwise_conv_s8()
245 if (dw_conv_params->ch_mult % 4 == 0 && input_dims->n == 1) in arm_depthwise_conv_s8()
253 dw_conv_params->ch_mult, in arm_depthwise_conv_s8()
256 dw_conv_params->padding.w, in arm_depthwise_conv_s8()
257 dw_conv_params->padding.h, in arm_depthwise_conv_s8()
258 dw_conv_params->stride.w, in arm_depthwise_conv_s8()
259 dw_conv_params->stride.h, in arm_depthwise_conv_s8()
266 dw_conv_params->output_offset, in arm_depthwise_conv_s8()
267 dw_conv_params->input_offset, in arm_depthwise_conv_s8()
[all …]
Darm_depthwise_conv_wrapper_s8.c50 const cmsis_nn_dw_conv_params *dw_conv_params, in arm_depthwise_conv_wrapper_s8() argument
62 if (1 == dw_conv_params->ch_mult && input_dims->n == 1) in arm_depthwise_conv_wrapper_s8()
65 if ((filter_dims->w == 3) && (filter_dims->h == 3) && (dw_conv_params->padding.h <= 1)) in arm_depthwise_conv_wrapper_s8()
68 dw_conv_params, in arm_depthwise_conv_wrapper_s8()
83 dw_conv_params, in arm_depthwise_conv_wrapper_s8()
98 dw_conv_params, in arm_depthwise_conv_wrapper_s8()
114 int32_t arm_depthwise_conv_wrapper_s8_get_buffer_size(const cmsis_nn_dw_conv_params *dw_conv_params, in arm_depthwise_conv_wrapper_s8_get_buffer_size() argument
119 (void)dw_conv_params; in arm_depthwise_conv_wrapper_s8_get_buffer_size()
Darm_depthwise_conv_3x3_s8.c53 const cmsis_nn_dw_conv_params *dw_conv_params, in arm_depthwise_conv_3x3_s8() argument
71 const int32_t pad_x = dw_conv_params->padding.w; in arm_depthwise_conv_3x3_s8()
72 const int32_t pad_y = dw_conv_params->padding.h; in arm_depthwise_conv_3x3_s8()
73 const int32_t stride_x = dw_conv_params->stride.w; in arm_depthwise_conv_3x3_s8()
74 const int32_t stride_y = dw_conv_params->stride.h; in arm_depthwise_conv_3x3_s8()
79 const int32_t output_offset = dw_conv_params->output_offset; in arm_depthwise_conv_3x3_s8()
80 const int32_t input_offset = dw_conv_params->input_offset; in arm_depthwise_conv_3x3_s8()
81 const int32_t output_activation_min = dw_conv_params->activation.min; in arm_depthwise_conv_3x3_s8()
82 const int32_t output_activation_max = dw_conv_params->activation.max; in arm_depthwise_conv_3x3_s8()
Darm_depthwise_conv_s8_opt.c52 const cmsis_nn_dw_conv_params *dw_conv_params, in arm_depthwise_conv_s8_opt() argument
77 const int32_t pad_x = dw_conv_params->padding.w; in arm_depthwise_conv_s8_opt()
78 const int32_t pad_y = dw_conv_params->padding.h; in arm_depthwise_conv_s8_opt()
79 const int32_t stride_x = dw_conv_params->stride.w; in arm_depthwise_conv_s8_opt()
80 const int32_t stride_y = dw_conv_params->stride.h; in arm_depthwise_conv_s8_opt()
85 const int32_t output_offset = dw_conv_params->output_offset; in arm_depthwise_conv_s8_opt()
86 const int32_t input_offset = dw_conv_params->input_offset; in arm_depthwise_conv_s8_opt()
87 const int32_t output_activation_min = dw_conv_params->activation.min; in arm_depthwise_conv_s8_opt()
88 const int32_t output_activation_max = dw_conv_params->activation.max; in arm_depthwise_conv_s8_opt()
396 dw_conv_params, in arm_depthwise_conv_s8_opt()
/hal_nxp-latest/mcux/mcux-sdk/CMSIS/NN/Include/
Darm_nnfunctions.h927 const cmsis_nn_dw_conv_params *dw_conv_params,
952 int32_t arm_depthwise_conv_wrapper_s8_get_buffer_size(const cmsis_nn_dw_conv_params *dw_conv_params,
988 const cmsis_nn_dw_conv_params *dw_conv_params,
1018 const cmsis_nn_dw_conv_params *dw_conv_params,
1053 const cmsis_nn_dw_conv_params *dw_conv_params,