Home
last modified time | relevance | path

Searched refs:clkdiv1 (Results 1 – 25 of 113) sorted by relevance

12345

/hal_nxp-latest/mcux/mcux-sdk/boards/frdmk22f/
Dclock_config.c166 ….clkdiv1 = 0x1230000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV2: /2, OUTDIV3: /3, …
268 ….clkdiv1 = 0x40000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV2: /1, OUTDIV3: /1, …
384 ….clkdiv1 = 0x1340000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV2: /2, OUTDIV3: /4, …
/hal_nxp-latest/mcux/mcux-sdk/boards/frdmkv31f/
Dclock_config.c165 ….clkdiv1 = 0x1340000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV2: /2, OUTDIV3: /4, …
271 ….clkdiv1 = 0x40000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV2: /1, OUTDIV3: /1, …
382 ….clkdiv1 = 0x1230000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV2: /2, OUTDIV3: /3, …
/hal_nxp-latest/mcux/mcux-sdk/boards/hvpkv31f120m/
Dclock_config.c154 ….clkdiv1 = 0x1330000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV2: /2, OUTDIV3: /4, …
252 ….clkdiv1 = 0x1230000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV2: /2, OUTDIV3: /3, …
353 ….clkdiv1 = 0x140000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV2: /1, OUTDIV3: /2, …
/hal_nxp-latest/mcux/mcux-sdk/boards/twrkv58f220m/
Dclock_config.c162 ….clkdiv1 = 0x01150000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV2: /2, OUTDIV3: /2, …
255 ….clkdiv1 = 0x70000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV2: /1, OUTDIV3: /1, …
356 ….clkdiv1 = 0x1390000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV2: /2, OUTDIV3: /4, …
/hal_nxp-latest/mcux/mcux-sdk/boards/frdmk28fa/
Dclock_config.c165 ….clkdiv1 = 0x1140000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV2: /2, OUTDIV3: /2,…
256 ….clkdiv1 = 0x40000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV2: /1, OUTDIV3: /1,…
364 ….clkdiv1 = 0x1150000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV2: /2, OUTDIV3: /2,…
/hal_nxp-latest/mcux/mcux-sdk/boards/frdmk66f/
Dclock_config.c177 ….clkdiv1 = 0x2260000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV2: /3, OUTDIV3: /3, …
286 ….clkdiv1 = 0x40000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV2: /1, OUTDIV3: /1, …
404 ….clkdiv1 = 0x1140000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV2: /2, OUTDIV3: /2, …
/hal_nxp-latest/mcux/mcux-sdk/boards/frdmmcxc242/
Dclock_config.c112 .clkdiv1 = 0x10000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */
186 .clkdiv1 = 0x10000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */
/hal_nxp-latest/mcux/mcux-sdk/boards/frdmkl27z/
Dclock_config.c110 .clkdiv1 = 0x10000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */
180 .clkdiv1 = 0x10000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */
/hal_nxp-latest/mcux/mcux-sdk/boards/frdmmcxc041/
Dclock_config.c107 .clkdiv1 = 0x10000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */
173 .clkdiv1 = 0x10000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */
/hal_nxp-latest/mcux/mcux-sdk/boards/frdmk32l2b/
Dclock_config.c114 .clkdiv1 = 0x10000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */
184 .clkdiv1 = 0x10000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */
/hal_nxp-latest/mcux/mcux-sdk/boards/frdmmcxc444/
Dclock_config.c104 .clkdiv1 = 0x10000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */
170 .clkdiv1 = 0x10000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /2 */
/hal_nxp-latest/mcux/mcux-sdk/boards/frdmkv11z/
Dclock_config.c146 ….clkdiv1 = 0x20000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /3, OUTDIV5: /1, …
234 ….clkdiv1 = 0x40000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /5, OUTDIV5: /1, …
/hal_nxp-latest/mcux/mcux-sdk/boards/hvpkv11z75m/
Dclock_config.c146 ….clkdiv1 = 0x20000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /3, OUTDIV5: /1, …
235 ….clkdiv1 = 0x40000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV4: /5, OUTDIV5: /1, …
/hal_nxp-latest/mcux/mcux-sdk/boards/frdmk64f/
Dclock_config.c169 ….clkdiv1 = 0x1240000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV2: /2, OUTDIV3: /3, …
269 ….clkdiv1 = 0x40000U, /* SIM_CLKDIV1 - OUTDIV1: /1, OUTDIV2: /1, OUTDIV3: /1, …
/hal_nxp-latest/mcux/mcux-sdk/boards/twrkm34z75m/
Dclock_config.c183 ….clkdiv1 = 0x2000000U, /* SIM_CLKDIV1 - CLKDIVSYS: /1, CLKDIVBUS: /3, FLASHCLKM…
279 ….clkdiv1 = 0x3000000U, /* SIM_CLKDIV1 - CLKDIVSYS: /1, CLKDIVBUS: /4, FLASHCLKM…
/hal_nxp-latest/mcux/mcux-sdk/boards/twrkm34z50mv3/
Dclock_config.c167 .clkdiv1 = 0x8000000U, /* SIM_CLKDIV1 - SYSDIV: /1, SYSCLKMODE: /2 */
261 .clkdiv1 = 0x8000000U, /* SIM_CLKDIV1 - SYSDIV: /1, SYSCLKMODE: /2 */
/hal_nxp-latest/mcux/mcux-sdk/boards/twrkm35z75m/
Dclock_config.c189 ….clkdiv1 = 0x2000000U, /* SIM_CLKDIV1 - CLKDIVSYS: /1, CLKDIVBUS: /3, FLASHCLKM…
285 ….clkdiv1 = 0x3000000U, /* SIM_CLKDIV1 - CLKDIVSYS: /1, CLKDIVBUS: /4, FLASHCLKM…
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC041/drivers/
Dfsl_clock.c235 SIM->CLKDIV1 = config->clkdiv1; in CLOCK_SetSimConfig()
Dfsl_clock.h236 uint32_t clkdiv1; /*!< SIM_CLKDIV1. */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC142/drivers/
Dfsl_clock.c272 SIM->CLKDIV1 = config->clkdiv1; in CLOCK_SetSimConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL17Z644/drivers/
Dfsl_clock.c273 SIM->CLKDIV1 = config->clkdiv1; in CLOCK_SetSimConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC141/drivers/
Dfsl_clock.c272 SIM->CLKDIV1 = config->clkdiv1; in CLOCK_SetSimConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC444/drivers/
Dfsl_clock.c272 SIM->CLKDIV1 = config->clkdiv1; in CLOCK_SetSimConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC443/drivers/
Dfsl_clock.c272 SIM->CLKDIV1 = config->clkdiv1; in CLOCK_SetSimConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2B31A/drivers/
Dfsl_clock.c273 SIM->CLKDIV1 = config->clkdiv1; in CLOCK_SetSimConfig()

12345