Home
last modified time | relevance | path

Searched refs:XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK (Results 1 – 12 of 12) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h35569 #define XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK (0x100U) macro
35571 …(x)) << XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h38659 #define XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK (0x100U) macro
38661 …(x)) << XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h45733 #define XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK (0x100U) macro
45735 …(x)) << XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h45754 #define XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK (0x100U) macro
45756 …(x)) << XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h47852 #define XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK (0x100U) macro
47854 …(x)) << XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h48821 #define XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK (0x100U) macro
48823 …(x)) << XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h52118 #define XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK (0x100U) macro
52120 …(x)) << XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h52231 #define XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK (0x100U) macro
52233 …(x)) << XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h50212 #define XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK (0x100U) macro
50214 …(x)) << XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h54342 #define XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK (0x100U) macro
54344 …(x)) << XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h54406 #define XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK (0x100U) macro
54408 …(x)) << XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_SHIFT)) & XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK)
/hal_nxp-latest/imx/devices/MCIMX6X/
DMCIMX6X_M4.h39977 #define XTALOSC24M_LOWPWR_CTRL_SET_L1_PWRGATE_MASK 0x100u macro