Searched refs:XSPI_TGIPCRS_ERR_MASK (Results 1 – 14 of 14) sorted by relevance
1166 tmp8 = (uint8_t)((base->TGIPCRS & XSPI_TGIPCRS_ERR_MASK) >> XSPI_TGIPCRS_ERR_SHIFT); in XSPI_GetMdadErrorReason()1279 tmp32 = (*(uint32_t *)tgIpcrsRegAddr & (XSPI_TGIPCRS_ERR_MASK | XSPI_TGIPCRS_VLD_MASK)); in XSPI_StartIpAccess()1280 if ((tmp32 & XSPI_TGIPCRS_ERR_MASK) != 0UL) in XSPI_StartIpAccess()
66687 #define XSPI_TGIPCRS_ERR_MASK (0x60000000U) macro66695 … (((uint32_t)(((uint32_t)(x)) << XSPI_TGIPCRS_ERR_SHIFT)) & XSPI_TGIPCRS_ERR_MASK)
66756 #define XSPI_TGIPCRS_ERR_MASK (0x60000000U) macro66764 … (((uint32_t)(((uint32_t)(x)) << XSPI_TGIPCRS_ERR_SHIFT)) & XSPI_TGIPCRS_ERR_MASK)
95829 #define XSPI_TGIPCRS_ERR_MASK (0x60000000U) macro95837 … (((uint32_t)(((uint32_t)(x)) << XSPI_TGIPCRS_ERR_SHIFT)) & XSPI_TGIPCRS_ERR_MASK)
91203 #define XSPI_TGIPCRS_ERR_MASK (0x60000000U) macro91211 … (((uint32_t)(((uint32_t)(x)) << XSPI_TGIPCRS_ERR_SHIFT)) & XSPI_TGIPCRS_ERR_MASK)
69979 #define XSPI_TGIPCRS_ERR_MASK (0x60000000U) macro69987 … (((uint32_t)(((uint32_t)(x)) << XSPI_TGIPCRS_ERR_SHIFT)) & XSPI_TGIPCRS_ERR_MASK)
69908 #define XSPI_TGIPCRS_ERR_MASK (0x60000000U) macro69916 … (((uint32_t)(((uint32_t)(x)) << XSPI_TGIPCRS_ERR_SHIFT)) & XSPI_TGIPCRS_ERR_MASK)
94428 #define XSPI_TGIPCRS_ERR_MASK (0x60000000U) macro94436 … (((uint32_t)(((uint32_t)(x)) << XSPI_TGIPCRS_ERR_SHIFT)) & XSPI_TGIPCRS_ERR_MASK)
99601 #define XSPI_TGIPCRS_ERR_MASK (0x60000000U) macro99609 … (((uint32_t)(((uint32_t)(x)) << XSPI_TGIPCRS_ERR_SHIFT)) & XSPI_TGIPCRS_ERR_MASK)
94327 #define XSPI_TGIPCRS_ERR_MASK (0x60000000U) macro94335 … (((uint32_t)(((uint32_t)(x)) << XSPI_TGIPCRS_ERR_SHIFT)) & XSPI_TGIPCRS_ERR_MASK)
99625 #define XSPI_TGIPCRS_ERR_MASK (0x60000000U) macro99633 … (((uint32_t)(((uint32_t)(x)) << XSPI_TGIPCRS_ERR_SHIFT)) & XSPI_TGIPCRS_ERR_MASK)
