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Searched refs:XSPI_SOCCR_HRESP_ERR_MASK_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h63987 #define XSPI_SOCCR_HRESP_ERR_MASK_MASK (0x8000000U) macro
63993 …(((uint32_t)(((uint32_t)(x)) << XSPI_SOCCR_HRESP_ERR_MASK_SHIFT)) & XSPI_SOCCR_HRESP_ERR_MASK_MASK)
DMIMXRT735S_cm33_core1.h64056 #define XSPI_SOCCR_HRESP_ERR_MASK_MASK (0x8000000U) macro
64062 …(((uint32_t)(((uint32_t)(x)) << XSPI_SOCCR_HRESP_ERR_MASK_SHIFT)) & XSPI_SOCCR_HRESP_ERR_MASK_MASK)
DMIMXRT735S_ezhv.h92862 #define XSPI_SOCCR_HRESP_ERR_MASK_MASK (0x8000000U) macro
92868 …(((uint32_t)(((uint32_t)(x)) << XSPI_SOCCR_HRESP_ERR_MASK_SHIFT)) & XSPI_SOCCR_HRESP_ERR_MASK_MASK)
DMIMXRT735S_cm33_core0.h88236 #define XSPI_SOCCR_HRESP_ERR_MASK_MASK (0x8000000U) macro
88242 …(((uint32_t)(((uint32_t)(x)) << XSPI_SOCCR_HRESP_ERR_MASK_SHIFT)) & XSPI_SOCCR_HRESP_ERR_MASK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h67279 #define XSPI_SOCCR_HRESP_ERR_MASK_MASK (0x8000000U) macro
67285 …(((uint32_t)(((uint32_t)(x)) << XSPI_SOCCR_HRESP_ERR_MASK_SHIFT)) & XSPI_SOCCR_HRESP_ERR_MASK_MASK)
DMIMXRT758S_hifi1.h67208 #define XSPI_SOCCR_HRESP_ERR_MASK_MASK (0x8000000U) macro
67214 …(((uint32_t)(((uint32_t)(x)) << XSPI_SOCCR_HRESP_ERR_MASK_SHIFT)) & XSPI_SOCCR_HRESP_ERR_MASK_MASK)
DMIMXRT758S_cm33_core0.h91461 #define XSPI_SOCCR_HRESP_ERR_MASK_MASK (0x8000000U) macro
91467 …(((uint32_t)(((uint32_t)(x)) << XSPI_SOCCR_HRESP_ERR_MASK_SHIFT)) & XSPI_SOCCR_HRESP_ERR_MASK_MASK)
DMIMXRT758S_ezhv.h96634 #define XSPI_SOCCR_HRESP_ERR_MASK_MASK (0x8000000U) macro
96640 …(((uint32_t)(((uint32_t)(x)) << XSPI_SOCCR_HRESP_ERR_MASK_SHIFT)) & XSPI_SOCCR_HRESP_ERR_MASK_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h67208 #define XSPI_SOCCR_HRESP_ERR_MASK_MASK (0x8000000U) macro
67214 …(((uint32_t)(((uint32_t)(x)) << XSPI_SOCCR_HRESP_ERR_MASK_SHIFT)) & XSPI_SOCCR_HRESP_ERR_MASK_MASK)
DMIMXRT798S_cm33_core1.h67279 #define XSPI_SOCCR_HRESP_ERR_MASK_MASK (0x8000000U) macro
67285 …(((uint32_t)(((uint32_t)(x)) << XSPI_SOCCR_HRESP_ERR_MASK_SHIFT)) & XSPI_SOCCR_HRESP_ERR_MASK_MASK)
DMIMXRT798S_hifi4.h91360 #define XSPI_SOCCR_HRESP_ERR_MASK_MASK (0x8000000U) macro
91366 …(((uint32_t)(((uint32_t)(x)) << XSPI_SOCCR_HRESP_ERR_MASK_SHIFT)) & XSPI_SOCCR_HRESP_ERR_MASK_MASK)
DMIMXRT798S_cm33_core0.h91461 #define XSPI_SOCCR_HRESP_ERR_MASK_MASK (0x8000000U) macro
91467 …(((uint32_t)(((uint32_t)(x)) << XSPI_SOCCR_HRESP_ERR_MASK_SHIFT)) & XSPI_SOCCR_HRESP_ERR_MASK_MASK)
DMIMXRT798S_ezhv.h96658 #define XSPI_SOCCR_HRESP_ERR_MASK_MASK (0x8000000U) macro
96664 …(((uint32_t)(((uint32_t)(x)) << XSPI_SOCCR_HRESP_ERR_MASK_SHIFT)) & XSPI_SOCCR_HRESP_ERR_MASK_MASK)