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Searched refs:XSPI_SMPR_FSDLY_MASK (Results 1 – 14 of 14) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/drivers/xspi/
Dfsl_xspi.c857 base->SMPR &= ~(XSPI_SMPR_FSPHS_MASK | XSPI_SMPR_FSDLY_MASK); in XSPI_SetDeviceConfig()
866 base->SMPR |= XSPI_SMPR_FSDLY_MASK; in XSPI_SetDeviceConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h64216 #define XSPI_SMPR_FSDLY_MASK (0x40U) macro
64222 … (((uint32_t)(((uint32_t)(x)) << XSPI_SMPR_FSDLY_SHIFT)) & XSPI_SMPR_FSDLY_MASK)
DMIMXRT735S_cm33_core1.h64285 #define XSPI_SMPR_FSDLY_MASK (0x40U) macro
64291 … (((uint32_t)(((uint32_t)(x)) << XSPI_SMPR_FSDLY_SHIFT)) & XSPI_SMPR_FSDLY_MASK)
DMIMXRT735S_ezhv.h93091 #define XSPI_SMPR_FSDLY_MASK (0x40U) macro
93097 … (((uint32_t)(((uint32_t)(x)) << XSPI_SMPR_FSDLY_SHIFT)) & XSPI_SMPR_FSDLY_MASK)
DMIMXRT735S_cm33_core0.h88465 #define XSPI_SMPR_FSDLY_MASK (0x40U) macro
88471 … (((uint32_t)(((uint32_t)(x)) << XSPI_SMPR_FSDLY_SHIFT)) & XSPI_SMPR_FSDLY_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h67508 #define XSPI_SMPR_FSDLY_MASK (0x40U) macro
67514 … (((uint32_t)(((uint32_t)(x)) << XSPI_SMPR_FSDLY_SHIFT)) & XSPI_SMPR_FSDLY_MASK)
DMIMXRT758S_hifi1.h67437 #define XSPI_SMPR_FSDLY_MASK (0x40U) macro
67443 … (((uint32_t)(((uint32_t)(x)) << XSPI_SMPR_FSDLY_SHIFT)) & XSPI_SMPR_FSDLY_MASK)
DMIMXRT758S_cm33_core0.h91690 #define XSPI_SMPR_FSDLY_MASK (0x40U) macro
91696 … (((uint32_t)(((uint32_t)(x)) << XSPI_SMPR_FSDLY_SHIFT)) & XSPI_SMPR_FSDLY_MASK)
DMIMXRT758S_ezhv.h96863 #define XSPI_SMPR_FSDLY_MASK (0x40U) macro
96869 … (((uint32_t)(((uint32_t)(x)) << XSPI_SMPR_FSDLY_SHIFT)) & XSPI_SMPR_FSDLY_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h67437 #define XSPI_SMPR_FSDLY_MASK (0x40U) macro
67443 … (((uint32_t)(((uint32_t)(x)) << XSPI_SMPR_FSDLY_SHIFT)) & XSPI_SMPR_FSDLY_MASK)
DMIMXRT798S_cm33_core1.h67508 #define XSPI_SMPR_FSDLY_MASK (0x40U) macro
67514 … (((uint32_t)(((uint32_t)(x)) << XSPI_SMPR_FSDLY_SHIFT)) & XSPI_SMPR_FSDLY_MASK)
DMIMXRT798S_hifi4.h91589 #define XSPI_SMPR_FSDLY_MASK (0x40U) macro
91595 … (((uint32_t)(((uint32_t)(x)) << XSPI_SMPR_FSDLY_SHIFT)) & XSPI_SMPR_FSDLY_MASK)
DMIMXRT798S_cm33_core0.h91690 #define XSPI_SMPR_FSDLY_MASK (0x40U) macro
91696 … (((uint32_t)(((uint32_t)(x)) << XSPI_SMPR_FSDLY_SHIFT)) & XSPI_SMPR_FSDLY_MASK)
DMIMXRT798S_ezhv.h96887 #define XSPI_SMPR_FSDLY_MASK (0x40U) macro
96893 … (((uint32_t)(((uint32_t)(x)) << XSPI_SMPR_FSDLY_SHIFT)) & XSPI_SMPR_FSDLY_MASK)