Home
last modified time | relevance | path

Searched refs:XSPI_PPW_RDSR_RDSR_MASK (Results 1 – 14 of 14) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/drivers/xspi/
Dfsl_xspi.h2231 return (uint16_t)(base->PPW_RDSR & XSPI_PPW_RDSR_RDSR_MASK); in XSPI_GetSFMStatusRegValue()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h65546 #define XSPI_PPW_RDSR_RDSR_MASK (0xFFFFU) macro
65549 … (((uint32_t)(((uint32_t)(x)) << XSPI_PPW_RDSR_RDSR_SHIFT)) & XSPI_PPW_RDSR_RDSR_MASK)
DMIMXRT735S_cm33_core1.h65615 #define XSPI_PPW_RDSR_RDSR_MASK (0xFFFFU) macro
65618 … (((uint32_t)(((uint32_t)(x)) << XSPI_PPW_RDSR_RDSR_SHIFT)) & XSPI_PPW_RDSR_RDSR_MASK)
DMIMXRT735S_ezhv.h94439 #define XSPI_PPW_RDSR_RDSR_MASK (0xFFFFU) macro
94442 … (((uint32_t)(((uint32_t)(x)) << XSPI_PPW_RDSR_RDSR_SHIFT)) & XSPI_PPW_RDSR_RDSR_MASK)
DMIMXRT735S_cm33_core0.h89813 #define XSPI_PPW_RDSR_RDSR_MASK (0xFFFFU) macro
89816 … (((uint32_t)(((uint32_t)(x)) << XSPI_PPW_RDSR_RDSR_SHIFT)) & XSPI_PPW_RDSR_RDSR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h68838 #define XSPI_PPW_RDSR_RDSR_MASK (0xFFFFU) macro
68841 … (((uint32_t)(((uint32_t)(x)) << XSPI_PPW_RDSR_RDSR_SHIFT)) & XSPI_PPW_RDSR_RDSR_MASK)
DMIMXRT758S_hifi1.h68767 #define XSPI_PPW_RDSR_RDSR_MASK (0xFFFFU) macro
68770 … (((uint32_t)(((uint32_t)(x)) << XSPI_PPW_RDSR_RDSR_SHIFT)) & XSPI_PPW_RDSR_RDSR_MASK)
DMIMXRT758S_cm33_core0.h93038 #define XSPI_PPW_RDSR_RDSR_MASK (0xFFFFU) macro
93041 … (((uint32_t)(((uint32_t)(x)) << XSPI_PPW_RDSR_RDSR_SHIFT)) & XSPI_PPW_RDSR_RDSR_MASK)
DMIMXRT758S_ezhv.h98211 #define XSPI_PPW_RDSR_RDSR_MASK (0xFFFFU) macro
98214 … (((uint32_t)(((uint32_t)(x)) << XSPI_PPW_RDSR_RDSR_SHIFT)) & XSPI_PPW_RDSR_RDSR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h68767 #define XSPI_PPW_RDSR_RDSR_MASK (0xFFFFU) macro
68770 … (((uint32_t)(((uint32_t)(x)) << XSPI_PPW_RDSR_RDSR_SHIFT)) & XSPI_PPW_RDSR_RDSR_MASK)
DMIMXRT798S_cm33_core1.h68838 #define XSPI_PPW_RDSR_RDSR_MASK (0xFFFFU) macro
68841 … (((uint32_t)(((uint32_t)(x)) << XSPI_PPW_RDSR_RDSR_SHIFT)) & XSPI_PPW_RDSR_RDSR_MASK)
DMIMXRT798S_hifi4.h92937 #define XSPI_PPW_RDSR_RDSR_MASK (0xFFFFU) macro
92940 … (((uint32_t)(((uint32_t)(x)) << XSPI_PPW_RDSR_RDSR_SHIFT)) & XSPI_PPW_RDSR_RDSR_MASK)
DMIMXRT798S_cm33_core0.h93038 #define XSPI_PPW_RDSR_RDSR_MASK (0xFFFFU) macro
93041 … (((uint32_t)(((uint32_t)(x)) << XSPI_PPW_RDSR_RDSR_SHIFT)) & XSPI_PPW_RDSR_RDSR_MASK)
DMIMXRT798S_ezhv.h98235 #define XSPI_PPW_RDSR_RDSR_MASK (0xFFFFU) macro
98238 … (((uint32_t)(((uint32_t)(x)) << XSPI_PPW_RDSR_RDSR_SHIFT)) & XSPI_PPW_RDSR_RDSR_MASK)