Searched refs:XSPI_IPEDCTXCTRL_CTX5_FREEZE_MASK (Results 1 – 7 of 7) sorted by relevance
93162 #define XSPI_IPEDCTXCTRL_CTX5_FREEZE_MASK (0xC00U) macro93165 …t32_t)(((uint32_t)(x)) << XSPI_IPEDCTXCTRL_CTX5_FREEZE_SHIFT)) & XSPI_IPEDCTXCTRL_CTX5_FREEZE_MASK)
93263 #define XSPI_IPEDCTXCTRL_CTX5_FREEZE_MASK (0xC00U) macro93266 …t32_t)(((uint32_t)(x)) << XSPI_IPEDCTXCTRL_CTX5_FREEZE_SHIFT)) & XSPI_IPEDCTXCTRL_CTX5_FREEZE_MASK)
98460 #define XSPI_IPEDCTXCTRL_CTX5_FREEZE_MASK (0xC00U) macro98463 …t32_t)(((uint32_t)(x)) << XSPI_IPEDCTXCTRL_CTX5_FREEZE_SHIFT)) & XSPI_IPEDCTXCTRL_CTX5_FREEZE_MASK)
94664 #define XSPI_IPEDCTXCTRL_CTX5_FREEZE_MASK (0xC00U) macro94667 …t32_t)(((uint32_t)(x)) << XSPI_IPEDCTXCTRL_CTX5_FREEZE_SHIFT)) & XSPI_IPEDCTXCTRL_CTX5_FREEZE_MASK)
90038 #define XSPI_IPEDCTXCTRL_CTX5_FREEZE_MASK (0xC00U) macro90041 …t32_t)(((uint32_t)(x)) << XSPI_IPEDCTXCTRL_CTX5_FREEZE_SHIFT)) & XSPI_IPEDCTXCTRL_CTX5_FREEZE_MASK)
98436 #define XSPI_IPEDCTXCTRL_CTX5_FREEZE_MASK (0xC00U) macro98439 …t32_t)(((uint32_t)(x)) << XSPI_IPEDCTXCTRL_CTX5_FREEZE_SHIFT)) & XSPI_IPEDCTXCTRL_CTX5_FREEZE_MASK)
