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Searched refs:XSPI_IPEDCTRL_IPGCMWR_MASK (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi4.h93077 #define XSPI_IPEDCTRL_IPGCMWR_MASK (0x40U) macro
93083 … (((uint32_t)(((uint32_t)(x)) << XSPI_IPEDCTRL_IPGCMWR_SHIFT)) & XSPI_IPEDCTRL_IPGCMWR_MASK)
DMIMXRT798S_cm33_core0.h93178 #define XSPI_IPEDCTRL_IPGCMWR_MASK (0x40U) macro
93184 … (((uint32_t)(((uint32_t)(x)) << XSPI_IPEDCTRL_IPGCMWR_SHIFT)) & XSPI_IPEDCTRL_IPGCMWR_MASK)
DMIMXRT798S_ezhv.h98375 #define XSPI_IPEDCTRL_IPGCMWR_MASK (0x40U) macro
98381 … (((uint32_t)(((uint32_t)(x)) << XSPI_IPEDCTRL_IPGCMWR_SHIFT)) & XSPI_IPEDCTRL_IPGCMWR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_ezhv.h94579 #define XSPI_IPEDCTRL_IPGCMWR_MASK (0x40U) macro
94585 … (((uint32_t)(((uint32_t)(x)) << XSPI_IPEDCTRL_IPGCMWR_SHIFT)) & XSPI_IPEDCTRL_IPGCMWR_MASK)
DMIMXRT735S_cm33_core0.h89953 #define XSPI_IPEDCTRL_IPGCMWR_MASK (0x40U) macro
89959 … (((uint32_t)(((uint32_t)(x)) << XSPI_IPEDCTRL_IPGCMWR_SHIFT)) & XSPI_IPEDCTRL_IPGCMWR_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core0.h93178 #define XSPI_IPEDCTRL_IPGCMWR_MASK (0x40U) macro
93184 … (((uint32_t)(((uint32_t)(x)) << XSPI_IPEDCTRL_IPGCMWR_SHIFT)) & XSPI_IPEDCTRL_IPGCMWR_MASK)
DMIMXRT758S_ezhv.h98351 #define XSPI_IPEDCTRL_IPGCMWR_MASK (0x40U) macro
98357 … (((uint32_t)(((uint32_t)(x)) << XSPI_IPEDCTRL_IPGCMWR_SHIFT)) & XSPI_IPEDCTRL_IPGCMWR_MASK)