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Searched refs:XSPI_BUFCR_SUBBUF1_DIV_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h63852 #define XSPI_BUFCR_SUBBUF1_DIV_MASK (0x7000000U) macro
63861 … (((uint32_t)(((uint32_t)(x)) << XSPI_BUFCR_SUBBUF1_DIV_SHIFT)) & XSPI_BUFCR_SUBBUF1_DIV_MASK)
DMIMXRT735S_cm33_core1.h63921 #define XSPI_BUFCR_SUBBUF1_DIV_MASK (0x7000000U) macro
63930 … (((uint32_t)(((uint32_t)(x)) << XSPI_BUFCR_SUBBUF1_DIV_SHIFT)) & XSPI_BUFCR_SUBBUF1_DIV_MASK)
DMIMXRT735S_ezhv.h92717 #define XSPI_BUFCR_SUBBUF1_DIV_MASK (0x7000000U) macro
92726 … (((uint32_t)(((uint32_t)(x)) << XSPI_BUFCR_SUBBUF1_DIV_SHIFT)) & XSPI_BUFCR_SUBBUF1_DIV_MASK)
DMIMXRT735S_cm33_core0.h88091 #define XSPI_BUFCR_SUBBUF1_DIV_MASK (0x7000000U) macro
88100 … (((uint32_t)(((uint32_t)(x)) << XSPI_BUFCR_SUBBUF1_DIV_SHIFT)) & XSPI_BUFCR_SUBBUF1_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core1.h67144 #define XSPI_BUFCR_SUBBUF1_DIV_MASK (0x7000000U) macro
67153 … (((uint32_t)(((uint32_t)(x)) << XSPI_BUFCR_SUBBUF1_DIV_SHIFT)) & XSPI_BUFCR_SUBBUF1_DIV_MASK)
DMIMXRT758S_hifi1.h67073 #define XSPI_BUFCR_SUBBUF1_DIV_MASK (0x7000000U) macro
67082 … (((uint32_t)(((uint32_t)(x)) << XSPI_BUFCR_SUBBUF1_DIV_SHIFT)) & XSPI_BUFCR_SUBBUF1_DIV_MASK)
DMIMXRT758S_cm33_core0.h91316 #define XSPI_BUFCR_SUBBUF1_DIV_MASK (0x7000000U) macro
91325 … (((uint32_t)(((uint32_t)(x)) << XSPI_BUFCR_SUBBUF1_DIV_SHIFT)) & XSPI_BUFCR_SUBBUF1_DIV_MASK)
DMIMXRT758S_ezhv.h96489 #define XSPI_BUFCR_SUBBUF1_DIV_MASK (0x7000000U) macro
96498 … (((uint32_t)(((uint32_t)(x)) << XSPI_BUFCR_SUBBUF1_DIV_SHIFT)) & XSPI_BUFCR_SUBBUF1_DIV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi1.h67073 #define XSPI_BUFCR_SUBBUF1_DIV_MASK (0x7000000U) macro
67082 … (((uint32_t)(((uint32_t)(x)) << XSPI_BUFCR_SUBBUF1_DIV_SHIFT)) & XSPI_BUFCR_SUBBUF1_DIV_MASK)
DMIMXRT798S_cm33_core1.h67144 #define XSPI_BUFCR_SUBBUF1_DIV_MASK (0x7000000U) macro
67153 … (((uint32_t)(((uint32_t)(x)) << XSPI_BUFCR_SUBBUF1_DIV_SHIFT)) & XSPI_BUFCR_SUBBUF1_DIV_MASK)
DMIMXRT798S_hifi4.h91215 #define XSPI_BUFCR_SUBBUF1_DIV_MASK (0x7000000U) macro
91224 … (((uint32_t)(((uint32_t)(x)) << XSPI_BUFCR_SUBBUF1_DIV_SHIFT)) & XSPI_BUFCR_SUBBUF1_DIV_MASK)
DMIMXRT798S_cm33_core0.h91316 #define XSPI_BUFCR_SUBBUF1_DIV_MASK (0x7000000U) macro
91325 … (((uint32_t)(((uint32_t)(x)) << XSPI_BUFCR_SUBBUF1_DIV_SHIFT)) & XSPI_BUFCR_SUBBUF1_DIV_MASK)
DMIMXRT798S_ezhv.h96513 #define XSPI_BUFCR_SUBBUF1_DIV_MASK (0x7000000U) macro
96522 … (((uint32_t)(((uint32_t)(x)) << XSPI_BUFCR_SUBBUF1_DIV_SHIFT)) & XSPI_BUFCR_SUBBUF1_DIV_MASK)