Searched refs:XSPI1_BASE (Results 1 – 7 of 7) sorted by relevance
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/ |
| D | MIMXRT798S_hifi4.h | 95401 #define XSPI1_BASE (0x50185000u) macro 95405 #define XSPI1 ((XSPI_Type *)XSPI1_BASE) 95417 #define XSPI_BASE_ADDRS { XSPI0_BASE, XSPI1_BASE, XSPI2_BASE } 95430 #define XSPI1_BASE (0x40185000u) macro 95432 #define XSPI1 ((XSPI_Type *)XSPI1_BASE) 95438 #define XSPI_BASE_ADDRS { XSPI0_BASE, XSPI1_BASE, XSPI2_BASE }
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| D | MIMXRT798S_cm33_core0.h | 95502 #define XSPI1_BASE (0x50185000u) macro 95506 #define XSPI1 ((XSPI_Type *)XSPI1_BASE) 95518 #define XSPI_BASE_ADDRS { XSPI0_BASE, XSPI1_BASE, XSPI2_BASE } 95531 #define XSPI1_BASE (0x40185000u) macro 95533 #define XSPI1 ((XSPI_Type *)XSPI1_BASE) 95539 #define XSPI_BASE_ADDRS { XSPI0_BASE, XSPI1_BASE, XSPI2_BASE }
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| D | MIMXRT798S_ezhv.h | 100694 #define XSPI1_BASE (0x40185000u) macro 100696 #define XSPI1 ((XSPI_Type *)XSPI1_BASE) 100702 #define XSPI_BASE_ADDRS { XSPI0_BASE, XSPI1_BASE, XSPI2_BASE }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/ |
| D | MIMXRT735S_cm33_core0.h | 92277 #define XSPI1_BASE (0x50185000u) macro 92281 #define XSPI1 ((XSPI_Type *)XSPI1_BASE) 92293 #define XSPI_BASE_ADDRS { XSPI0_BASE, XSPI1_BASE, XSPI2_BASE } 92306 #define XSPI1_BASE (0x40185000u) macro 92308 #define XSPI1 ((XSPI_Type *)XSPI1_BASE) 92314 #define XSPI_BASE_ADDRS { XSPI0_BASE, XSPI1_BASE, XSPI2_BASE }
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| D | MIMXRT735S_ezhv.h | 96898 #define XSPI1_BASE (0x40185000u) macro 96900 #define XSPI1 ((XSPI_Type *)XSPI1_BASE) 96906 #define XSPI_BASE_ADDRS { XSPI0_BASE, XSPI1_BASE, XSPI2_BASE }
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/ |
| D | MIMXRT758S_cm33_core0.h | 95502 #define XSPI1_BASE (0x50185000u) macro 95506 #define XSPI1 ((XSPI_Type *)XSPI1_BASE) 95518 #define XSPI_BASE_ADDRS { XSPI0_BASE, XSPI1_BASE, XSPI2_BASE } 95531 #define XSPI1_BASE (0x40185000u) macro 95533 #define XSPI1 ((XSPI_Type *)XSPI1_BASE) 95539 #define XSPI_BASE_ADDRS { XSPI0_BASE, XSPI1_BASE, XSPI2_BASE }
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| D | MIMXRT758S_ezhv.h | 100670 #define XSPI1_BASE (0x40185000u) macro 100672 #define XSPI1 ((XSPI_Type *)XSPI1_BASE) 100678 #define XSPI_BASE_ADDRS { XSPI0_BASE, XSPI1_BASE, XSPI2_BASE }
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