Home
last modified time | relevance | path

Searched refs:XRDC2_MRC_MRGD_W6_VLD_MASK (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/drivers/xrdc2/
Dfsl_xrdc2.c452 w6 |= XRDC2_MRC_MRGD_W6_VLD_MASK; in XRDC2_SetMemAccessConfig()
477 base->MRCI_MRGDJ[mrc][mrgd].MRC_MRGD_W6 = (reg | XRDC2_MRC_MRGD_W6_VLD_MASK); in XRDC2_SetMemAccessValid()
481 base->MRCI_MRGDJ[mrc][mrgd].MRC_MRGD_W6 = (reg & ~XRDC2_MRC_MRGD_W6_VLD_MASK); in XRDC2_SetMemAccessValid()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h84459 #define XRDC2_MRC_MRGD_W6_VLD_MASK (0x80000000U) macro
84465 … (((uint32_t)(((uint32_t)(x)) << XRDC2_MRC_MRGD_W6_VLD_SHIFT)) & XRDC2_MRC_MRGD_W6_VLD_MASK)
DMIMXRT1175_cm7.h83557 #define XRDC2_MRC_MRGD_W6_VLD_MASK (0x80000000U) macro
83563 … (((uint32_t)(((uint32_t)(x)) << XRDC2_MRC_MRGD_W6_VLD_SHIFT)) & XRDC2_MRC_MRGD_W6_VLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h83055 #define XRDC2_MRC_MRGD_W6_VLD_MASK (0x80000000U) macro
83061 … (((uint32_t)(((uint32_t)(x)) << XRDC2_MRC_MRGD_W6_VLD_SHIFT)) & XRDC2_MRC_MRGD_W6_VLD_MASK)
DMIMXRT1165_cm4.h83957 #define XRDC2_MRC_MRGD_W6_VLD_MASK (0x80000000U) macro
83963 … (((uint32_t)(((uint32_t)(x)) << XRDC2_MRC_MRGD_W6_VLD_SHIFT)) & XRDC2_MRC_MRGD_W6_VLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h83557 #define XRDC2_MRC_MRGD_W6_VLD_MASK (0x80000000U) macro
83563 … (((uint32_t)(((uint32_t)(x)) << XRDC2_MRC_MRGD_W6_VLD_SHIFT)) & XRDC2_MRC_MRGD_W6_VLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h89420 #define XRDC2_MRC_MRGD_W6_VLD_MASK (0x80000000U) macro
89426 … (((uint32_t)(((uint32_t)(x)) << XRDC2_MRC_MRGD_W6_VLD_SHIFT)) & XRDC2_MRC_MRGD_W6_VLD_MASK)
DMIMXRT1166_cm7.h88518 #define XRDC2_MRC_MRGD_W6_VLD_MASK (0x80000000U) macro
88524 … (((uint32_t)(((uint32_t)(x)) << XRDC2_MRC_MRGD_W6_VLD_SHIFT)) & XRDC2_MRC_MRGD_W6_VLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h89919 #define XRDC2_MRC_MRGD_W6_VLD_MASK (0x80000000U) macro
89925 … (((uint32_t)(((uint32_t)(x)) << XRDC2_MRC_MRGD_W6_VLD_SHIFT)) & XRDC2_MRC_MRGD_W6_VLD_MASK)
DMIMXRT1173_cm7.h89017 #define XRDC2_MRC_MRGD_W6_VLD_MASK (0x80000000U) macro
89023 … (((uint32_t)(((uint32_t)(x)) << XRDC2_MRC_MRGD_W6_VLD_SHIFT)) & XRDC2_MRC_MRGD_W6_VLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h89020 #define XRDC2_MRC_MRGD_W6_VLD_MASK (0x80000000U) macro
89026 … (((uint32_t)(((uint32_t)(x)) << XRDC2_MRC_MRGD_W6_VLD_SHIFT)) & XRDC2_MRC_MRGD_W6_VLD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h99687 #define XRDC2_MRC_MRGD_W6_VLD_MASK (0x80000000U) macro
99693 … (((uint32_t)(((uint32_t)(x)) << XRDC2_MRC_MRGD_W6_VLD_SHIFT)) & XRDC2_MRC_MRGD_W6_VLD_MASK)
DMIMXRT1176_cm4.h100589 #define XRDC2_MRC_MRGD_W6_VLD_MASK (0x80000000U) macro
100595 … (((uint32_t)(((uint32_t)(x)) << XRDC2_MRC_MRGD_W6_VLD_SHIFT)) & XRDC2_MRC_MRGD_W6_VLD_MASK)