Searched refs:XCVR_MISC_XCVR_STATUS_TSM_IRQ1_MASK (Results 1 – 4 of 4) sorted by relevance
46361 #define XCVR_MISC_XCVR_STATUS_TSM_IRQ1_MASK (0x200U) macro46367 …t)(((uint32_t)(x)) << XCVR_MISC_XCVR_STATUS_TSM_IRQ1_SHIFT)) & XCVR_MISC_XCVR_STATUS_TSM_IRQ1_MASK)
48530 #define XCVR_MISC_XCVR_STATUS_TSM_IRQ1_MASK (0x200U) macro48536 …t)(((uint32_t)(x)) << XCVR_MISC_XCVR_STATUS_TSM_IRQ1_SHIFT)) & XCVR_MISC_XCVR_STATUS_TSM_IRQ1_MASK)
54127 #define XCVR_MISC_XCVR_STATUS_TSM_IRQ1_MASK (0x200U) macro54133 …t)(((uint32_t)(x)) << XCVR_MISC_XCVR_STATUS_TSM_IRQ1_SHIFT)) & XCVR_MISC_XCVR_STATUS_TSM_IRQ1_MASK)
59915 #define XCVR_MISC_XCVR_STATUS_TSM_IRQ1_MASK (0x200U) macro59921 …t)(((uint32_t)(x)) << XCVR_MISC_XCVR_STATUS_TSM_IRQ1_SHIFT)) & XCVR_MISC_XCVR_STATUS_TSM_IRQ1_MASK)
