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Searched refs:XCACHE1_BASE (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/
DMIMXRT798S_hifi4.h90772 #define XCACHE1_BASE (0x50034000u) macro
90776 #define XCACHE1 ((XCACHE_Type *)XCACHE1_BASE)
90780 #define XCACHE_BASE_ADDRS { XCACHE0_BASE, XCACHE1_BASE }
90793 #define XCACHE1_BASE (0x40034000u) macro
90795 #define XCACHE1 ((XCACHE_Type *)XCACHE1_BASE)
90797 #define XCACHE_BASE_ADDRS { XCACHE0_BASE, XCACHE1_BASE }
DMIMXRT798S_cm33_core0.h90868 #define XCACHE1_BASE (0x50034000u) macro
90872 #define XCACHE1 ((XCACHE_Type *)XCACHE1_BASE)
90876 #define XCACHE_BASE_ADDRS { XCACHE0_BASE, XCACHE1_BASE }
90889 #define XCACHE1_BASE (0x40034000u) macro
90891 #define XCACHE1 ((XCACHE_Type *)XCACHE1_BASE)
90893 #define XCACHE_BASE_ADDRS { XCACHE0_BASE, XCACHE1_BASE }
DMIMXRT798S_ezhv.h96087 #define XCACHE1_BASE (0x40034000u) macro
96089 #define XCACHE1 ((XCACHE_Type *)XCACHE1_BASE)
96091 #define XCACHE_BASE_ADDRS { XCACHE0_BASE, XCACHE1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_cm33_core0.h87643 #define XCACHE1_BASE (0x50034000u) macro
87647 #define XCACHE1 ((XCACHE_Type *)XCACHE1_BASE)
87651 #define XCACHE_BASE_ADDRS { XCACHE0_BASE, XCACHE1_BASE }
87664 #define XCACHE1_BASE (0x40034000u) macro
87666 #define XCACHE1 ((XCACHE_Type *)XCACHE1_BASE)
87668 #define XCACHE_BASE_ADDRS { XCACHE0_BASE, XCACHE1_BASE }
DMIMXRT735S_ezhv.h92291 #define XCACHE1_BASE (0x40034000u) macro
92293 #define XCACHE1 ((XCACHE_Type *)XCACHE1_BASE)
92295 #define XCACHE_BASE_ADDRS { XCACHE0_BASE, XCACHE1_BASE }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/
DMIMXRT758S_cm33_core0.h90868 #define XCACHE1_BASE (0x50034000u) macro
90872 #define XCACHE1 ((XCACHE_Type *)XCACHE1_BASE)
90876 #define XCACHE_BASE_ADDRS { XCACHE0_BASE, XCACHE1_BASE }
90889 #define XCACHE1_BASE (0x40034000u) macro
90891 #define XCACHE1 ((XCACHE_Type *)XCACHE1_BASE)
90893 #define XCACHE_BASE_ADDRS { XCACHE0_BASE, XCACHE1_BASE }
DMIMXRT758S_ezhv.h96063 #define XCACHE1_BASE (0x40034000u) macro
96065 #define XCACHE1 ((XCACHE_Type *)XCACHE1_BASE)
96067 #define XCACHE_BASE_ADDRS { XCACHE0_BASE, XCACHE1_BASE }