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Searched refs:WDOG2_IRQn (Results 1 – 25 of 72) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1171/
Dfsl_pm_device.h561 #define PM_WSID_WDOG2_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(WDOG2_IRQn) /*!< WD…
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1172/
Dfsl_pm_device.h561 #define PM_WSID_WDOG2_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(WDOG2_IRQn) /*!< WD…
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1173/
Dfsl_pm_device.h561 #define PM_WSID_WDOG2_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(WDOG2_IRQn) /*!< WD…
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1176/
Dfsl_pm_device.h561 #define PM_WSID_WDOG2_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(WDOG2_IRQn) /*!< WD…
/hal_nxp-latest/mcux/mcux-sdk/components/power_manager/devices/MIMXRT1175/
Dfsl_pm_device.h561 #define PM_WSID_WDOG2_IRQ PM_ENCODE_WAKEUP_SOURCE_ID(WDOG2_IRQn) /*!< WD…
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h158 WDOG2_IRQn = 68, /**< Watchdog Interrupt from A7 subsystem */ enumerator
41783 #define WDOG_IRQS { WDOG0_IRQn, WDOG1_IRQn, WDOG2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h159 WDOG2_IRQn = 68, /**< Watchdog Interrupt from A7 subsystem */ enumerator
41784 #define WDOG_IRQS { WDOG0_IRQn, WDOG1_IRQn, WDOG2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h131 WDOG2_IRQn = 45, /**< WDOG2 interrupt */ enumerator
33905 #define WDOG_IRQS { NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h135 WDOG2_IRQn = 45, /**< WDOG2 interrupt */ enumerator
36848 #define WDOG_IRQS { NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h129 WDOG2_IRQn = 45, /**< WDOG2 interrupt */ enumerator
43922 #define WDOG_IRQS { NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h137 WDOG2_IRQn = 45, /**< WDOG2 interrupt */ enumerator
43943 #define WDOG_IRQS { NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h139 WDOG2_IRQn = 45, /**< WDOG2 interrupt */ enumerator
46037 #define WDOG_IRQS { NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h127 WDOG2_IRQn = 45, /**< WDOG2 interrupt */ enumerator
47006 #define WDOG_IRQS { NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h139 WDOG2_IRQn = 45, /**< WDOG2 interrupt */ enumerator
50303 #define WDOG_IRQS { NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h127 WDOG2_IRQn = 45, /**< WDOG2 interrupt */ enumerator
50416 #define WDOG_IRQS { NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h142 WDOG2_IRQn = 45, /**< WDOG2 interrupt */ enumerator
48397 #define WDOG_IRQS { NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN5/
DMIMX8MN5_cm7.h163 WDOG2_IRQn = 79, /**< Watchdog Timer reset */ enumerator
55435 #define WDOG_IRQS { NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn, WDOG3_IRQ…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN2/
DMIMX8MN2_cm7.h161 WDOG2_IRQn = 79, /**< Watchdog Timer reset */ enumerator
55433 #define WDOG_IRQS { NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn, WDOG3_IRQ…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN4/
DMIMX8MN4_cm7.h161 WDOG2_IRQn = 79, /**< Watchdog Timer reset */ enumerator
55433 #define WDOG_IRQS { NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn, WDOG3_IRQ…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN3/
DMIMX8MN3_cm7.h163 WDOG2_IRQn = 79, /**< Watchdog Timer reset */ enumerator
55435 #define WDOG_IRQS { NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn, WDOG3_IRQ…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h139 WDOG2_IRQn = 45, /**< WDOG2 interrupt */ enumerator
52527 #define WDOG_IRQS { NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn }
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN1/
DMIMX8MN1_cm7.h163 WDOG2_IRQn = 79, /**< Watchdog Timer reset */ enumerator
55435 #define WDOG_IRQS { NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn, WDOG3_IRQ…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN6/
DMIMX8MN6_cm7.h161 WDOG2_IRQn = 79, /**< Watchdog Timer reset */ enumerator
55433 #define WDOG_IRQS { NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn, WDOG3_IRQ…
DMIMX8MN6_ca53.h187 WDOG2_IRQn = 111, /**< Watchdog Timer reset */ enumerator
55446 #define WDOG_IRQS { NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn, WDOG3_IRQ…
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MQ5/
DMIMX8MQ5_cm4.h165 WDOG2_IRQn = 79, /**< Watchdog Timer reset */ enumerator
56754 #define WDOG_IRQS { NotAvail_IRQn, WDOG1_IRQn, WDOG2_IRQn, WDOG3_IRQ…

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