Searched refs:VPU_HEVC_SWREG41_SW_ENC_RGBCOEFFF_MASK (Results 1 – 6 of 6) sorted by relevance
115986 #define VPU_HEVC_SWREG41_SW_ENC_RGBCOEFFF_MASK (0xFFFF0000U) macro115988 …int32_t)(x)) << VPU_HEVC_SWREG41_SW_ENC_RGBCOEFFF_SHIFT)) & VPU_HEVC_SWREG41_SW_ENC_RGBCOEFFF_MASK)
111154 #define VPU_HEVC_SWREG41_SW_ENC_RGBCOEFFF_MASK (0xFFFF0000U) macro111156 …int32_t)(x)) << VPU_HEVC_SWREG41_SW_ENC_RGBCOEFFF_SHIFT)) & VPU_HEVC_SWREG41_SW_ENC_RGBCOEFFF_MASK)
116019 #define VPU_HEVC_SWREG41_SW_ENC_RGBCOEFFF_MASK (0xFFFF0000U) macro116021 …int32_t)(x)) << VPU_HEVC_SWREG41_SW_ENC_RGBCOEFFF_SHIFT)) & VPU_HEVC_SWREG41_SW_ENC_RGBCOEFFF_MASK)
