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Searched refs:VPU_HEVC_SWREG211_SW_ENC_IPCM2_RIGHT (Results 1 – 6 of 6) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML6/
DMIMX8ML6_cm7.h117375 #define VPU_HEVC_SWREG211_SW_ENC_IPCM2_RIGHT(x) (((uint32_t)(((uint32_t)(x)) << VPU_HEVC_SWREG211_… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML4/
DMIMX8ML4_cm7.h117375 #define VPU_HEVC_SWREG211_SW_ENC_IPCM2_RIGHT(x) (((uint32_t)(((uint32_t)(x)) << VPU_HEVC_SWREG211_… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML3/
DMIMX8ML3_cm7.h117375 #define VPU_HEVC_SWREG211_SW_ENC_IPCM2_RIGHT(x) (((uint32_t)(((uint32_t)(x)) << VPU_HEVC_SWREG211_… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML8/
DMIMX8ML8_dsp.h112543 #define VPU_HEVC_SWREG211_SW_ENC_IPCM2_RIGHT(x) (((uint32_t)(((uint32_t)(x)) << VPU_HEVC_SWREG211_… macro
DMIMX8ML8_cm7.h117375 #define VPU_HEVC_SWREG211_SW_ENC_IPCM2_RIGHT(x) (((uint32_t)(((uint32_t)(x)) << VPU_HEVC_SWREG211_… macro
DMIMX8ML8_ca53.h117408 #define VPU_HEVC_SWREG211_SW_ENC_IPCM2_RIGHT(x) (((uint32_t)(((uint32_t)(x)) << VPU_HEVC_SWREG211_… macro