Home
last modified time | relevance | path

Searched refs:VPU_H264_SWREG80_SW_ENC_HWCAVLCSUPPORT_MASK (Results 1 – 6 of 6) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML6/
DMIMX8ML6_cm7.h112578 #define VPU_H264_SWREG80_SW_ENC_HWCAVLCSUPPORT_MASK (0x100000U) macro
112584 …)) << VPU_H264_SWREG80_SW_ENC_HWCAVLCSUPPORT_SHIFT)) & VPU_H264_SWREG80_SW_ENC_HWCAVLCSUPPORT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML4/
DMIMX8ML4_cm7.h112578 #define VPU_H264_SWREG80_SW_ENC_HWCAVLCSUPPORT_MASK (0x100000U) macro
112584 …)) << VPU_H264_SWREG80_SW_ENC_HWCAVLCSUPPORT_SHIFT)) & VPU_H264_SWREG80_SW_ENC_HWCAVLCSUPPORT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML3/
DMIMX8ML3_cm7.h112578 #define VPU_H264_SWREG80_SW_ENC_HWCAVLCSUPPORT_MASK (0x100000U) macro
112584 …)) << VPU_H264_SWREG80_SW_ENC_HWCAVLCSUPPORT_SHIFT)) & VPU_H264_SWREG80_SW_ENC_HWCAVLCSUPPORT_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML8/
DMIMX8ML8_dsp.h107746 #define VPU_H264_SWREG80_SW_ENC_HWCAVLCSUPPORT_MASK (0x100000U) macro
107752 …)) << VPU_H264_SWREG80_SW_ENC_HWCAVLCSUPPORT_SHIFT)) & VPU_H264_SWREG80_SW_ENC_HWCAVLCSUPPORT_MASK)
DMIMX8ML8_cm7.h112578 #define VPU_H264_SWREG80_SW_ENC_HWCAVLCSUPPORT_MASK (0x100000U) macro
112584 …)) << VPU_H264_SWREG80_SW_ENC_HWCAVLCSUPPORT_SHIFT)) & VPU_H264_SWREG80_SW_ENC_HWCAVLCSUPPORT_MASK)
DMIMX8ML8_ca53.h112611 #define VPU_H264_SWREG80_SW_ENC_HWCAVLCSUPPORT_MASK (0x100000U) macro
112617 …)) << VPU_H264_SWREG80_SW_ENC_HWCAVLCSUPPORT_SHIFT)) & VPU_H264_SWREG80_SW_ENC_HWCAVLCSUPPORT_MASK)