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Searched refs:VPU_G1_SWREG103_SW_REFER0_CH_BASE (Results 1 – 13 of 13) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM3/
DMIMX8MM3_cm4.h76110 #define VPU_G1_SWREG103_SW_REFER0_CH_BASE(x) (((uint32_t)(((uint32_t)(x)) << VPU_G1_SWREG103_SW… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM5/
DMIMX8MM5_cm4.h76110 #define VPU_G1_SWREG103_SW_REFER0_CH_BASE(x) (((uint32_t)(((uint32_t)(x)) << VPU_G1_SWREG103_SW… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM6/
DMIMX8MM6_cm4.h76110 #define VPU_G1_SWREG103_SW_REFER0_CH_BASE(x) (((uint32_t)(((uint32_t)(x)) << VPU_G1_SWREG103_SW… macro
DMIMX8MM6_ca53.h75574 #define VPU_G1_SWREG103_SW_REFER0_CH_BASE(x) (((uint32_t)(((uint32_t)(x)) << VPU_G1_SWREG103_SW… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM1/
DMIMX8MM1_cm4.h76110 #define VPU_G1_SWREG103_SW_REFER0_CH_BASE(x) (((uint32_t)(((uint32_t)(x)) << VPU_G1_SWREG103_SW… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM2/
DMIMX8MM2_cm4.h76110 #define VPU_G1_SWREG103_SW_REFER0_CH_BASE(x) (((uint32_t)(((uint32_t)(x)) << VPU_G1_SWREG103_SW… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MM4/
DMIMX8MM4_cm4.h76110 #define VPU_G1_SWREG103_SW_REFER0_CH_BASE(x) (((uint32_t)(((uint32_t)(x)) << VPU_G1_SWREG103_SW… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML6/
DMIMX8ML6_cm7.h105391 #define VPU_G1_SWREG103_SW_REFER0_CH_BASE(x) (((uint32_t)(((uint32_t)(x)) << VPU_G1_SWREG103_SW… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML4/
DMIMX8ML4_cm7.h105391 #define VPU_G1_SWREG103_SW_REFER0_CH_BASE(x) (((uint32_t)(((uint32_t)(x)) << VPU_G1_SWREG103_SW… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML3/
DMIMX8ML3_cm7.h105391 #define VPU_G1_SWREG103_SW_REFER0_CH_BASE(x) (((uint32_t)(((uint32_t)(x)) << VPU_G1_SWREG103_SW… macro
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8ML8/
DMIMX8ML8_dsp.h101055 #define VPU_G1_SWREG103_SW_REFER0_CH_BASE(x) (((uint32_t)(((uint32_t)(x)) << VPU_G1_SWREG103_SW… macro
DMIMX8ML8_cm7.h105391 #define VPU_G1_SWREG103_SW_REFER0_CH_BASE(x) (((uint32_t)(((uint32_t)(x)) << VPU_G1_SWREG103_SW… macro
DMIMX8ML8_ca53.h105424 #define VPU_G1_SWREG103_SW_REFER0_CH_BASE(x) (((uint32_t)(((uint32_t)(x)) << VPU_G1_SWREG103_SW… macro