Searched refs:VGPUCLKSEL_OFFSET (Results 1 – 3 of 3) sorted by relevance
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/drivers/ |
| D | fsl_clock.h | 945 #define VGPUCLKSEL_OFFSET 0x320 macro
1655 … CLKCTL4_TUPLE_MUXA(VGPUCLKSEL_OFFSET, 0), /*!< Attach Media VDD2 base clock to VGPU Clock. */
1656 …kMAIN_PLL_PFD0_to_VGPU = CLKCTL4_TUPLE_MUXA(VGPUCLKSEL_OFFSET, 1), /*!< Attach Main PLL PFD0 clock…
1657 …kFRO0_DIV1_to_VGPU = CLKCTL4_TUPLE_MUXA(VGPUCLKSEL_OFFSET, 2), /*!< Attach FRO0 max clock to V…
1658 …kMAIN_PLL_PFD2_to_VGPU = CLKCTL4_TUPLE_MUXA(VGPUCLKSEL_OFFSET, 3), /*!< Attach Main PLL PFD2 clock…
1659 …kNONE_to_VGPU = CLKCTL4_TUPLE_MUXA_NONE(VGPUCLKSEL_OFFSET, 0), /*!< Attach NONE to VGPU C…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/drivers/ |
| D | fsl_clock.h | 945 #define VGPUCLKSEL_OFFSET 0x320 macro
1655 … CLKCTL4_TUPLE_MUXA(VGPUCLKSEL_OFFSET, 0), /*!< Attach Media VDD2 base clock to VGPU Clock. */
1656 …kMAIN_PLL_PFD0_to_VGPU = CLKCTL4_TUPLE_MUXA(VGPUCLKSEL_OFFSET, 1), /*!< Attach Main PLL PFD0 clock…
1657 …kFRO0_DIV1_to_VGPU = CLKCTL4_TUPLE_MUXA(VGPUCLKSEL_OFFSET, 2), /*!< Attach FRO0 max clock to V…
1658 …kMAIN_PLL_PFD2_to_VGPU = CLKCTL4_TUPLE_MUXA(VGPUCLKSEL_OFFSET, 3), /*!< Attach Main PLL PFD2 clock…
1659 …kNONE_to_VGPU = CLKCTL4_TUPLE_MUXA_NONE(VGPUCLKSEL_OFFSET, 0), /*!< Attach NONE to VGPU C…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/drivers/ |
| D | fsl_clock.h | 945 #define VGPUCLKSEL_OFFSET 0x320 macro
1655 … CLKCTL4_TUPLE_MUXA(VGPUCLKSEL_OFFSET, 0), /*!< Attach Media VDD2 base clock to VGPU Clock. */
1656 …kMAIN_PLL_PFD0_to_VGPU = CLKCTL4_TUPLE_MUXA(VGPUCLKSEL_OFFSET, 1), /*!< Attach Main PLL PFD0 clock…
1657 …kFRO0_DIV1_to_VGPU = CLKCTL4_TUPLE_MUXA(VGPUCLKSEL_OFFSET, 2), /*!< Attach FRO0 max clock to V…
1658 …kMAIN_PLL_PFD2_to_VGPU = CLKCTL4_TUPLE_MUXA(VGPUCLKSEL_OFFSET, 3), /*!< Attach Main PLL PFD2 clock…
1659 …kNONE_to_VGPU = CLKCTL4_TUPLE_MUXA_NONE(VGPUCLKSEL_OFFSET, 0), /*!< Attach NONE to VGPU C…
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