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Searched refs:VDDLPSR_AI_CTRL (Results 1 – 20 of 20) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/drivers/
Dfsl_anatop_ai.c272 ANADIG_MISC->VDDLPSR_AI_CTRL &= ~ANADIG_MISC_VDDLPSR_AI_CTRL_VDDLPSR_AIRWB_MASK; in ANATOP_AI_Access()
274 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
278 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
284 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
288 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
290 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
294 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
303 ANADIG_MISC->VDDLPSR_AI_CTRL &= ~ANADIG_MISC_VDDLPSR_AI_CTRL_VDDLPSR_AIRWB_MASK; in ANATOP_AI_Access()
305 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
309 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/drivers/
Dfsl_anatop_ai.c272 ANADIG_MISC->VDDLPSR_AI_CTRL &= ~ANADIG_MISC_VDDLPSR_AI_CTRL_VDDLPSR_AIRWB_MASK; in ANATOP_AI_Access()
274 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
278 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
284 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
288 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
290 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
294 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
303 ANADIG_MISC->VDDLPSR_AI_CTRL &= ~ANADIG_MISC_VDDLPSR_AI_CTRL_VDDLPSR_AIRWB_MASK; in ANATOP_AI_Access()
305 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
309 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/drivers/
Dfsl_anatop_ai.c272 ANADIG_MISC->VDDLPSR_AI_CTRL &= ~ANADIG_MISC_VDDLPSR_AI_CTRL_VDDLPSR_AIRWB_MASK; in ANATOP_AI_Access()
274 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
278 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
284 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
288 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
290 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
294 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
303 ANADIG_MISC->VDDLPSR_AI_CTRL &= ~ANADIG_MISC_VDDLPSR_AI_CTRL_VDDLPSR_AIRWB_MASK; in ANATOP_AI_Access()
305 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
309 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/drivers/
Dfsl_anatop_ai.c272 ANADIG_MISC->VDDLPSR_AI_CTRL &= ~ANADIG_MISC_VDDLPSR_AI_CTRL_VDDLPSR_AIRWB_MASK; in ANATOP_AI_Access()
274 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
278 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
284 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
288 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
290 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
294 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
303 ANADIG_MISC->VDDLPSR_AI_CTRL &= ~ANADIG_MISC_VDDLPSR_AI_CTRL_VDDLPSR_AIRWB_MASK; in ANATOP_AI_Access()
305 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
309 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/drivers/
Dfsl_anatop_ai.c272 ANADIG_MISC->VDDLPSR_AI_CTRL &= ~ANADIG_MISC_VDDLPSR_AI_CTRL_VDDLPSR_AIRWB_MASK; in ANATOP_AI_Access()
274 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
278 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
284 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
288 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
290 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
294 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
303 ANADIG_MISC->VDDLPSR_AI_CTRL &= ~ANADIG_MISC_VDDLPSR_AI_CTRL_VDDLPSR_AIRWB_MASK; in ANATOP_AI_Access()
305 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
309 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/drivers/
Dfsl_anatop_ai.c272 ANADIG_MISC->VDDLPSR_AI_CTRL &= ~ANADIG_MISC_VDDLPSR_AI_CTRL_VDDLPSR_AIRWB_MASK; in ANATOP_AI_Access()
274 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
278 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
284 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
288 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
290 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
294 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
303 ANADIG_MISC->VDDLPSR_AI_CTRL &= ~ANADIG_MISC_VDDLPSR_AI_CTRL_VDDLPSR_AIRWB_MASK; in ANATOP_AI_Access()
305 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
309 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/drivers/
Dfsl_anatop_ai.c272 ANADIG_MISC->VDDLPSR_AI_CTRL &= ~ANADIG_MISC_VDDLPSR_AI_CTRL_VDDLPSR_AIRWB_MASK; in ANATOP_AI_Access()
274 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
278 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
284 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
288 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
290 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
294 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
303 ANADIG_MISC->VDDLPSR_AI_CTRL &= ~ANADIG_MISC_VDDLPSR_AI_CTRL_VDDLPSR_AIRWB_MASK; in ANATOP_AI_Access()
305 temp = ANADIG_MISC->VDDLPSR_AI_CTRL; in ANATOP_AI_Access()
309 ANADIG_MISC->VDDLPSR_AI_CTRL = temp; in ANATOP_AI_Access()
[all …]
/hal_nxp-latest/mcux/mcux-sdk/drivers/tempsensor/
Dfsl_tempsensor.c156 ANADIG_MISC->VDDLPSR_AI_CTRL = (0x00UL << 16) | (address & 0xFFFFU); in TMPSNS_AIWriteAccess()
176 ANADIG_MISC->VDDLPSR_AI_CTRL = (0x01UL << 16) | (address & 0xFFFFU); in TMPSNS_AIReadAccess()
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/
DMIMXRT1175_cm4.h4605 __IO uint32_t VDDLPSR_AI_CTRL; /**< VDDSOC_AI_CTRL_REGISTER, offset: 0x8E0 */ member
DMIMXRT1175_cm7.h4608 __IO uint32_t VDDLPSR_AI_CTRL; /**< VDDSOC_AI_CTRL_REGISTER, offset: 0x8E0 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/
DMIMXRT1165_cm7.h4599 __IO uint32_t VDDLPSR_AI_CTRL; /**< VDDSOC_AI_CTRL_REGISTER, offset: 0x8E0 */ member
DMIMXRT1165_cm4.h4596 __IO uint32_t VDDLPSR_AI_CTRL; /**< VDDSOC_AI_CTRL_REGISTER, offset: 0x8E0 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1171/
DMIMXRT1171.h4608 __IO uint32_t VDDLPSR_AI_CTRL; /**< VDDSOC_AI_CTRL_REGISTER, offset: 0x8E0 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1166/
DMIMXRT1166_cm4.h4611 __IO uint32_t VDDLPSR_AI_CTRL; /**< VDDSOC_AI_CTRL_REGISTER, offset: 0x8E0 */ member
DMIMXRT1166_cm7.h4614 __IO uint32_t VDDLPSR_AI_CTRL; /**< VDDSOC_AI_CTRL_REGISTER, offset: 0x8E0 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1173/
DMIMXRT1173_cm4.h4617 __IO uint32_t VDDLPSR_AI_CTRL; /**< VDDSOC_AI_CTRL_REGISTER, offset: 0x8E0 */ member
DMIMXRT1173_cm7.h4620 __IO uint32_t VDDLPSR_AI_CTRL; /**< VDDSOC_AI_CTRL_REGISTER, offset: 0x8E0 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/
DMIMXRT1172.h4623 __IO uint32_t VDDLPSR_AI_CTRL; /**< VDDSOC_AI_CTRL_REGISTER, offset: 0x8E0 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/
DMIMXRT1176_cm7.h4625 __IO uint32_t VDDLPSR_AI_CTRL; /**< VDDSOC_AI_CTRL_REGISTER, offset: 0x8E0 */ member
DMIMXRT1176_cm4.h4622 __IO uint32_t VDDLPSR_AI_CTRL; /**< VDDSOC_AI_CTRL_REGISTER, offset: 0x8E0 */ member