Home
last modified time | relevance | path

Searched refs:VDD2COMBASECLKSEL_OFFSET (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/drivers/
Dfsl_clock.h797 #define VDD2COMBASECLKSEL_OFFSET 0x428 macro
1006 …CLKCTL0_TUPLE_MUXA(VDD2COMBASECLKSEL_OFFSET, 0), /*!< Attach Fro1 Divided-by-3 to VDD2_COM Base Cl…
1008 …CLKCTL0_TUPLE_MUXA(VDD2COMBASECLKSEL_OFFSET, 1), /*!< Attach Fro1 Divided-by-1 to VDD2_COM Base Cl…
1010 …CLKCTL0_TUPLE_MUXA(VDD2COMBASECLKSEL_OFFSET, 2), /*!< Attach Fro0 Divided-by-3 to VDD2_COM Base Cl…
1012 … CLKCTL0_TUPLE_MUXA(VDD2COMBASECLKSEL_OFFSET, 3), /*!< Attach LPOSC to VDD2_COM Base Clock. */
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT798S/drivers/
Dfsl_clock.h797 #define VDD2COMBASECLKSEL_OFFSET 0x428 macro
1006 …CLKCTL0_TUPLE_MUXA(VDD2COMBASECLKSEL_OFFSET, 0), /*!< Attach Fro1 Divided-by-3 to VDD2_COM Base Cl…
1008 …CLKCTL0_TUPLE_MUXA(VDD2COMBASECLKSEL_OFFSET, 1), /*!< Attach Fro1 Divided-by-1 to VDD2_COM Base Cl…
1010 …CLKCTL0_TUPLE_MUXA(VDD2COMBASECLKSEL_OFFSET, 2), /*!< Attach Fro0 Divided-by-3 to VDD2_COM Base Cl…
1012 … CLKCTL0_TUPLE_MUXA(VDD2COMBASECLKSEL_OFFSET, 3), /*!< Attach LPOSC to VDD2_COM Base Clock. */
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT758S/drivers/
Dfsl_clock.h797 #define VDD2COMBASECLKSEL_OFFSET 0x428 macro
1006 …CLKCTL0_TUPLE_MUXA(VDD2COMBASECLKSEL_OFFSET, 0), /*!< Attach Fro1 Divided-by-3 to VDD2_COM Base Cl…
1008 …CLKCTL0_TUPLE_MUXA(VDD2COMBASECLKSEL_OFFSET, 1), /*!< Attach Fro1 Divided-by-1 to VDD2_COM Base Cl…
1010 …CLKCTL0_TUPLE_MUXA(VDD2COMBASECLKSEL_OFFSET, 2), /*!< Attach Fro0 Divided-by-3 to VDD2_COM Base Cl…
1012 … CLKCTL0_TUPLE_MUXA(VDD2COMBASECLKSEL_OFFSET, 3), /*!< Attach LPOSC to VDD2_COM Base Clock. */