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Searched refs:VCCR (Results 1 – 25 of 50) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32k1/Mcu/src/
DClock_Ip_Divider.c536 RegValue = IP_SCG->VCCR; in Clock_Ip_SetScgVlprDivcore_TrustedCall()
539 IP_SCG->VCCR = RegValue; in Clock_Ip_SetScgVlprDivcore_TrustedCall()
549 RegValue = IP_SCG->VCCR; in Clock_Ip_SetScgVlprDivbus_TrustedCall()
552 IP_SCG->VCCR = RegValue; in Clock_Ip_SetScgVlprDivbus_TrustedCall()
562 RegValue = IP_SCG->VCCR; in Clock_Ip_SetScgVlprDivslow_TrustedCall()
565 IP_SCG->VCCR = RegValue; in Clock_Ip_SetScgVlprDivslow_TrustedCall()
DClock_Ip_Specific.c725 …SelectorConfigurations[SelectorConfigIndex].Value = ClockSource[(IP_SCG->VCCR & SCG_VCCR_SCS_MASK)… in getSelectorConfig()
789 …CoreDividerConfigurations[DividerConfigIndex].Value = ((IP_SCG->VCCR & SCG_VCCR_DIVCORE_MASK) >> S… in getCoreDividerConfig()
855 …BusDividerConfigurations[DividerConfigIndex].Value = ((IP_SCG->VCCR & SCG_VCCR_DIVBUS_MASK) >> SCG… in getBusDividerConfig()
920 …SlowDividerConfigurations[DividerConfigIndex].Value = ((IP_SCG->VCCR & SCG_VCCR_DIVSLOW_MASK) >> S… in getSlowDividerConfig()
DClock_Ip_Selector.c537 RegValue = IP_SCG->VCCR; in Clock_Ip_SetScgVlprSel_TrustedCall()
540 IP_SCG->VCCR = RegValue; in Clock_Ip_SetScgVlprSel_TrustedCall()
/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K116_SCG.h78 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
DS32K118_SCG.h78 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
DS32K142W_SCG.h78 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
DS32K142_SCG.h78 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
DS32K146_SCG.h78 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
DS32K144_SCG.h78 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
DS32K148_SCG.h78 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
DS32K144W_SCG.h78 __IO uint32_t VCCR; /**< VLPR Clock Control Register, offset: 0x18 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16Z4/drivers/
Dfsl_clock.h722 SCG->VCCR = *(Config.configInt); in CLOCK_SetVlprModeSysClkConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z4/drivers/
Dfsl_clock.h718 SCG->VCCR = *(Config.configInt); in CLOCK_SetVlprModeSysClkConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z4/drivers/
Dfsl_clock.h710 SCG->VCCR = *(Config.configInt); in CLOCK_SetVlprModeSysClkConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z7/drivers/
Dfsl_clock.h765 SCG->VCCR = *(Config.configInt); in CLOCK_SetVlprModeSysClkConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z9/drivers/
Dfsl_clock.h776 SCG->VCCR = *(Config.configInt); in CLOCK_SetVlprModeSysClkConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14Z7/drivers/
Dfsl_clock.h796 SCG->VCCR = *(Config.configInt); in CLOCK_SetVlprModeSysClkConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z7/drivers/
Dfsl_clock.h766 SCG->VCCR = *(Config.configInt); in CLOCK_SetVlprModeSysClkConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE17Z9/drivers/
Dfsl_clock.h784 SCG->VCCR = *(Config.configInt); in CLOCK_SetVlprModeSysClkConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE15Z7/drivers/
Dfsl_clock.h803 SCG->VCCR = *(Config.configInt); in CLOCK_SetVlprModeSysClkConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE12Z7/drivers/
Dfsl_clock.h763 SCG->VCCR = *(Config.configInt); in CLOCK_SetVlprModeSysClkConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE13Z9/drivers/
Dfsl_clock.h783 SCG->VCCR = *(Config.configInt); in CLOCK_SetVlprModeSysClkConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE18F16/drivers/
Dfsl_clock.h794 SCG->VCCR = *(Config.configInt); in CLOCK_SetVlprModeSysClkConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE16F16/drivers/
Dfsl_clock.h794 SCG->VCCR = *(Config.configInt); in CLOCK_SetVlprModeSysClkConfig()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKE14F16/drivers/
Dfsl_clock.h788 SCG->VCCR = *(Config.configInt); in CLOCK_SetVlprModeSysClkConfig()

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