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Searched refs:USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK (Results 1 – 25 of 119) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/usdhc/
Dfsl_usdhc.h1070 base->VEND_SPEC |= USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK; in USDHC_ForceClockOn()
1074 base->VEND_SPEC &= ~USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK; in USDHC_ForceClockOn()
/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_USDHC.h1368 #define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK (0x100U) macro
1371 …t32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm4.h24537 #define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK (0x100U) macro
24543 …t32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)
DK32L3A60_cm0plus.h24647 #define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK (0x100U) macro
24653 …t32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h33568 #define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK (0x100U) macro
33574 …t32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)
DMIMXRT685S_cm33.h44524 #define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK (0x100U) macro
44530 …t32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h40919 #define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK (0x100U) macro
40925 …t32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h40920 #define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK (0x100U) macro
40926 …t32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h44524 #define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK (0x100U) macro
44530 …t32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h49233 #define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK (0x100U) macro
49239 …t32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)
DMIMXRT595S_cm33.h60278 #define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK (0x100U) macro
60284 …t32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h43528 #define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK (0x100U) macro
43534 …t32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h43549 #define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK (0x100U) macro
43555 …t32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h45648 #define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK (0x100U) macro
45654 …t32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h46612 #define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK (0x100U) macro
46618 …t32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h49914 #define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK (0x100U) macro
49920 …t32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h50022 #define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK (0x100U) macro
50028 …t32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h58651 #define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK (0x100U) macro
58657 …t32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h48003 #define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK (0x100U) macro
48009 …t32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN5/
DMIMX8MN5_cm7.h55017 #define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK (0x100U) macro
55023 …t32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN2/
DMIMX8MN2_cm7.h55015 #define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK (0x100U) macro
55021 …t32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN4/
DMIMX8MN4_cm7.h55015 #define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK (0x100U) macro
55021 …t32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h62436 #define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK (0x100U) macro
62442 …t32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN3/
DMIMX8MN3_cm7.h55017 #define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK (0x100U) macro
55023 …t32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h60277 #define USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK (0x100U) macro
60283 …t32_t)(((uint32_t)(x)) << USDHC_VEND_SPEC_FRC_SDCLK_ON_SHIFT)) & USDHC_VEND_SPEC_FRC_SDCLK_ON_MASK)

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