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Searched refs:USDHC_PRES_STATE_DLSL_MASK (Results 1 – 25 of 118) sorted by relevance

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/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_USDHC.h371 #define USDHC_PRES_STATE_DLSL_MASK (0xFF000000U) macro
374 … (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm4.h23515 #define USDHC_PRES_STATE_DLSL_MASK (0xFF000000U) macro
23527 … (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
DK32L3A60_cm0plus.h23625 #define USDHC_PRES_STATE_DLSL_MASK (0xFF000000U) macro
23637 … (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h32190 #define USDHC_PRES_STATE_DLSL_MASK (0xFF000000U) macro
32202 … (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
DMIMXRT685S_cm33.h43146 #define USDHC_PRES_STATE_DLSL_MASK (0xFF000000U) macro
43158 … (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h39527 #define USDHC_PRES_STATE_DLSL_MASK (0xFF000000U) macro
39539 … (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h39528 #define USDHC_PRES_STATE_DLSL_MASK (0xFF000000U) macro
39540 … (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h43146 #define USDHC_PRES_STATE_DLSL_MASK (0xFF000000U) macro
43158 … (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h47849 #define USDHC_PRES_STATE_DLSL_MASK (0xFF000000U) macro
47861 … (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
DMIMXRT595S_cm33.h58894 #define USDHC_PRES_STATE_DLSL_MASK (0xFF000000U) macro
58906 … (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h42250 #define USDHC_PRES_STATE_DLSL_MASK (0xFF000000U) macro
42262 … (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h42271 #define USDHC_PRES_STATE_DLSL_MASK (0xFF000000U) macro
42283 … (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h44348 #define USDHC_PRES_STATE_DLSL_MASK (0xFF000000U) macro
44360 … (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h45334 #define USDHC_PRES_STATE_DLSL_MASK (0xFF000000U) macro
45346 … (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h48614 #define USDHC_PRES_STATE_DLSL_MASK (0xFF000000U) macro
48626 … (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h48744 #define USDHC_PRES_STATE_DLSL_MASK (0xFF000000U) macro
48756 … (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h57267 #define USDHC_PRES_STATE_DLSL_MASK (0xFF000000U) macro
57279 … (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h46725 #define USDHC_PRES_STATE_DLSL_MASK (0xFF000000U) macro
46737 … (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN5/
DMIMX8MN5_cm7.h53584 #define USDHC_PRES_STATE_DLSL_MASK (0xFF000000U) macro
53588 … (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN2/
DMIMX8MN2_cm7.h53582 #define USDHC_PRES_STATE_DLSL_MASK (0xFF000000U) macro
53586 … (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN4/
DMIMX8MN4_cm7.h53582 #define USDHC_PRES_STATE_DLSL_MASK (0xFF000000U) macro
53586 … (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT735S/
DMIMXRT735S_hifi1.h61085 #define USDHC_PRES_STATE_DLSL_MASK (0xFF000000U) macro
61097 … (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
DMIMXRT735S_cm33_core1.h61152 #define USDHC_PRES_STATE_DLSL_MASK (0xFF000000U) macro
61164 … (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX8MN3/
DMIMX8MN3_cm7.h53584 #define USDHC_PRES_STATE_DLSL_MASK (0xFF000000U) macro
53588 … (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h58893 #define USDHC_PRES_STATE_DLSL_MASK (0xFF000000U) macro
58905 … (((uint32_t)(((uint32_t)(x)) << USDHC_PRES_STATE_DLSL_SHIFT)) & USDHC_PRES_STATE_DLSL_MASK)

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