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Searched refs:USBPHY_PWD_CLR_RSVD0_MASK (Results 1 – 12 of 12) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h31912 #define USBPHY_PWD_CLR_RSVD0_MASK (0x3FFU) macro
31914 … (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RSVD0_SHIFT)) & USBPHY_PWD_CLR_RSVD0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h34855 #define USBPHY_PWD_CLR_RSVD0_MASK (0x3FFU) macro
34857 … (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RSVD0_SHIFT)) & USBPHY_PWD_CLR_RSVD0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h40138 #define USBPHY_PWD_CLR_RSVD0_MASK (0x3FFU) macro
40140 … (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RSVD0_SHIFT)) & USBPHY_PWD_CLR_RSVD0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h40159 #define USBPHY_PWD_CLR_RSVD0_MASK (0x3FFU) macro
40161 … (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RSVD0_SHIFT)) & USBPHY_PWD_CLR_RSVD0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h42215 #define USBPHY_PWD_CLR_RSVD0_MASK (0x3FFU) macro
42217 … (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RSVD0_SHIFT)) & USBPHY_PWD_CLR_RSVD0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h43222 #define USBPHY_PWD_CLR_RSVD0_MASK (0x3FFU) macro
43224 … (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RSVD0_SHIFT)) & USBPHY_PWD_CLR_RSVD0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h46481 #define USBPHY_PWD_CLR_RSVD0_MASK (0x3FFU) macro
46483 … (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RSVD0_SHIFT)) & USBPHY_PWD_CLR_RSVD0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h46632 #define USBPHY_PWD_CLR_RSVD0_MASK (0x3FFU) macro
46634 … (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RSVD0_SHIFT)) & USBPHY_PWD_CLR_RSVD0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h44608 #define USBPHY_PWD_CLR_RSVD0_MASK (0x3FFU) macro
44610 … (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RSVD0_SHIFT)) & USBPHY_PWD_CLR_RSVD0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h48738 #define USBPHY_PWD_CLR_RSVD0_MASK (0x3FFU) macro
48740 … (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RSVD0_SHIFT)) & USBPHY_PWD_CLR_RSVD0_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h48802 #define USBPHY_PWD_CLR_RSVD0_MASK (0x3FFU) macro
48804 … (((uint32_t)(((uint32_t)(x)) << USBPHY_PWD_CLR_RSVD0_SHIFT)) & USBPHY_PWD_CLR_RSVD0_MASK)
/hal_nxp-latest/imx/devices/MCIMX6X/
DMCIMX6X_M4.h37958 #define USBPHY_PWD_CLR_RSVD0_MASK 0x3FFu macro
37960 … (((uint32_t)(((uint32_t)(x))<<USBPHY_PWD_CLR_RSVD0_SHIFT))&USBPHY_PWD_CLR_RSVD0_MASK)