| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/drivers/ |
| D | fsl_clock.c | 556 USBPHY1->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs0PhyPllClock()
571 USBPHY1->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
1358 USBPHY2->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs1PhyPllClock()
1374 USBPHY2->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs1PhyPllClock()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/drivers/ |
| D | fsl_clock.c | 548 USBPHY1->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs0PhyPllClock()
563 USBPHY1->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
1337 USBPHY2->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs1PhyPllClock()
1353 USBPHY2->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs1PhyPllClock()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/drivers/ |
| D | fsl_clock.c | 552 USBPHY1->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs0PhyPllClock()
567 USBPHY1->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
1341 USBPHY2->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs1PhyPllClock()
1357 USBPHY2->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs1PhyPllClock()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/drivers/ |
| D | fsl_clock.c | 556 USBPHY1->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs0PhyPllClock()
571 USBPHY1->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
1358 USBPHY2->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs1PhyPllClock()
1374 USBPHY2->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs1PhyPllClock()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/drivers/ |
| D | fsl_clock.c | 556 USBPHY1->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs0PhyPllClock()
571 USBPHY1->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
1358 USBPHY2->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs1PhyPllClock()
1374 USBPHY2->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs1PhyPllClock()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/drivers/ |
| D | fsl_clock.c | 516 USBPHY->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs0PhyPllClock()
531 USBPHY->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/drivers/ |
| D | fsl_clock.c | 516 USBPHY->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs0PhyPllClock()
531 USBPHY->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/drivers/ |
| D | fsl_clock.c | 549 USBPHY->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs0PhyPllClock()
564 USBPHY->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/drivers/ |
| D | fsl_clock.c | 510 USBPHY->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs0PhyPllClock()
525 USBPHY->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
|
| /hal_nxp-latest/mcux/middleware/mcux-sdk-middleware-usb/phy/ |
| D | usb_phy.c | 210 usbPhyBase->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* set to 1U to gate clocks */ in USB_EhciPhyDeinit()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/drivers/ |
| D | fsl_clock.c | 523 USBPHY->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs0PhyPllClock()
538 USBPHY->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/drivers/ |
| D | fsl_clock.c | 523 USBPHY->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; in CLOCK_EnableUsbhs0PhyPllClock()
538 USBPHY->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MK65F18/drivers/ |
| D | fsl_clock.c | 748 USBPHY->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; /* Clear to 0U to run clocks */ in CLOCK_EnableUsbhs0PhyPllClock()
764 USBPHY->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MK26F18/drivers/ |
| D | fsl_clock.c | 748 USBPHY->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; /* Clear to 0U to run clocks */ in CLOCK_EnableUsbhs0PhyPllClock()
764 USBPHY->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MK28FA15/drivers/ |
| D | fsl_clock.c | 729 USBPHY->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; /* Clear to 0U to run clocks */ in CLOCK_EnableUsbhs0PhyPllClock()
741 USBPHY->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MK27FA15/drivers/ |
| D | fsl_clock.c | 729 USBPHY->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; /* Clear to 0U to run clocks */ in CLOCK_EnableUsbhs0PhyPllClock()
741 USBPHY->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MK66F18/drivers/ |
| D | fsl_clock.c | 747 USBPHY->CTRL &= ~USBPHY_CTRL_CLKGATE_MASK; /* Clear to 0U to run clocks */ in CLOCK_EnableUsbhs0PhyPllClock()
763 USBPHY->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1181/drivers/ |
| D | fsl_clock.c | 1818 USBPHY1->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
1912 USBPHY2->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs1PhyPllClock()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1189/drivers/ |
| D | fsl_clock.c | 1818 USBPHY1->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
1912 USBPHY2->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs1PhyPllClock()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1182/drivers/ |
| D | fsl_clock.c | 1818 USBPHY1->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
1912 USBPHY2->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs1PhyPllClock()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1187/drivers/ |
| D | fsl_clock.c | 1818 USBPHY1->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
1912 USBPHY2->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs1PhyPllClock()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1175/drivers/ |
| D | fsl_clock.c | 1858 USBPHY1->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
1952 USBPHY2->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs1PhyPllClock()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1172/drivers/ |
| D | fsl_clock.c | 1858 USBPHY1->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
1952 USBPHY2->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs1PhyPllClock()
|
| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1165/drivers/ |
| D | fsl_clock.c | 1845 USBPHY1->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
1939 USBPHY2->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs1PhyPllClock()
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| /hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1176/drivers/ |
| D | fsl_clock.c | 1858 USBPHY1->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs0PhyPllClock()
1952 USBPHY2->CTRL |= USBPHY_CTRL_CLKGATE_MASK; /* Set to 1U to gate clocks */ in CLOCK_DisableUsbhs1PhyPllClock()
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