Home
last modified time | relevance | path

Searched refs:TSI_GENCS_NSCN_MASK (Results 1 – 17 of 17) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/drivers/tsi/
Dfsl_tsi_v4.h407 … base->GENCS = (base->GENCS & ~(TSI_GENCS_NSCN_MASK | ALL_FLAGS_MASK)) | (TSI_GENCS_NSCN(number)); in TSI_SetNumberOfScans()
/hal_nxp-latest/mcux/mcux-sdk/drivers/tsi/tsi_v4/
Dfsl_tsi_v4.h407 … base->GENCS = (base->GENCS & ~(TSI_GENCS_NSCN_MASK | ALL_FLAGS_MASK)) | (TSI_GENCS_NSCN(number)); in TSI_SetNumberOfScans()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKL25Z4/
DMKL25Z4.h4381 #define TSI_GENCS_NSCN_MASK (0x1F00U) macro
4383 … (((uint32_t)(((uint32_t)(x)) << TSI_GENCS_NSCN_SHIFT)) & TSI_GENCS_NSCN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A41A/
DK32L2A41A.h17785 #define TSI_GENCS_NSCN_MASK (0x1F00U) macro
17821 … (((uint32_t)(((uint32_t)(x)) << TSI_GENCS_NSCN_SHIFT)) & TSI_GENCS_NSCN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A31A/
DK32L2A31A.h17785 #define TSI_GENCS_NSCN_MASK (0x1F00U) macro
17821 … (((uint32_t)(((uint32_t)(x)) << TSI_GENCS_NSCN_SHIFT)) & TSI_GENCS_NSCN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW31Z4/
DMKW31Z4.h7795 #define TSI_GENCS_NSCN_MASK (0x1F00U) macro
7797 … (((uint32_t)(((uint32_t)(x)) << TSI_GENCS_NSCN_SHIFT)) & TSI_GENCS_NSCN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW30Z4/
DMKW30Z4.h8934 #define TSI_GENCS_NSCN_MASK 0x1F00u macro
8937 …x) (((uint32_t)(((uint32_t)(x))<<TSI_GENCS_NSCN_SHIFT))&TSI_GENCS_NSCN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW21Z4/
DMKW21Z4.h7724 #define TSI_GENCS_NSCN_MASK (0x1F00U) macro
7726 … (((uint32_t)(((uint32_t)(x)) << TSI_GENCS_NSCN_SHIFT)) & TSI_GENCS_NSCN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW20Z4/
DMKW20Z4.h8934 #define TSI_GENCS_NSCN_MASK 0x1F00u macro
8937 …x) (((uint32_t)(((uint32_t)(x))<<TSI_GENCS_NSCN_SHIFT))&TSI_GENCS_NSCN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW41Z4/
DMKW41Z4.h7795 #define TSI_GENCS_NSCN_MASK (0x1F00U) macro
7797 … (((uint32_t)(((uint32_t)(x)) << TSI_GENCS_NSCN_SHIFT)) & TSI_GENCS_NSCN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW40Z4/
DMKW40Z4.h8934 #define TSI_GENCS_NSCN_MASK 0x1F00u macro
8937 …x) (((uint32_t)(((uint32_t)(x))<<TSI_GENCS_NSCN_SHIFT))&TSI_GENCS_NSCN_MASK)
DMKW40Z4_extension.h27312 #define TSI_RD_GENCS_NSCN(base) ((TSI_GENCS_REG(base) & TSI_GENCS_NSCN_MASK) >> TSI_GENCS_NSCN_SHIF…
27316 #define TSI_WR_GENCS_NSCN(base, value) (TSI_RMW_GENCS(base, (TSI_GENCS_NSCN_MASK | TSI_GENCS_EOSF_M…
/hal_nxp-latest/mcux/mcux-sdk/devices/MK80F25615/
DMK80F25615.h24864 #define TSI_GENCS_NSCN_MASK (0x1F00U) macro
24900 … (((uint32_t)(((uint32_t)(x)) << TSI_GENCS_NSCN_SHIFT)) & TSI_GENCS_NSCN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK82F25615/
DMK82F25615.h25844 #define TSI_GENCS_NSCN_MASK (0x1F00U) macro
25880 … (((uint32_t)(((uint32_t)(x)) << TSI_GENCS_NSCN_SHIFT)) & TSI_GENCS_NSCN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK26F18/
DMK26F18.h26852 #define TSI_GENCS_NSCN_MASK (0x1F00U) macro
26888 … (((uint32_t)(((uint32_t)(x)) << TSI_GENCS_NSCN_SHIFT)) & TSI_GENCS_NSCN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK65F18/
DMK65F18.h28695 #define TSI_GENCS_NSCN_MASK (0x1F00U) macro
28731 … (((uint32_t)(((uint32_t)(x)) << TSI_GENCS_NSCN_SHIFT)) & TSI_GENCS_NSCN_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK66F18/
DMK66F18.h28695 #define TSI_GENCS_NSCN_MASK (0x1F00U) macro
28731 … (((uint32_t)(((uint32_t)(x)) << TSI_GENCS_NSCN_SHIFT)) & TSI_GENCS_NSCN_MASK)