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Searched refs:TRNG_VID2_ECO_REV_MASK (Results 1 – 25 of 29) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A31A/
DK32L2A31A.h17647 #define TRNG_VID2_ECO_REV_MASK (0xFF00U) macro
17652 … (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A41A/
DK32L2A41A.h17647 #define TRNG_VID2_ECO_REV_MASK (0xFF00U) macro
17652 … (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW31Z4/
DMKW31Z4.h7715 #define TRNG_VID2_ECO_REV_MASK (0xFF00U) macro
7717 … (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW21Z4/
DMKW21Z4.h7644 #define TRNG_VID2_ECO_REV_MASK (0xFF00U) macro
7646 … (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm4.h21855 #define TRNG_VID2_ECO_REV_MASK (0xFF00U) macro
21860 … (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
DK32L3A60_cm0plus.h21965 #define TRNG_VID2_ECO_REV_MASK (0xFF00U) macro
21970 … (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW41Z4/
DMKW41Z4.h7715 #define TRNG_VID2_ECO_REV_MASK (0xFF00U) macro
7717 … (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h28345 #define TRNG_VID2_ECO_REV_MASK (0xFF00U) macro
28350 … (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
DMIMXRT685S_cm33.h37996 #define TRNG_VID2_ECO_REV_MASK (0xFF00U) macro
38001 … (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h34929 #define TRNG_VID2_ECO_REV_MASK (0xFF00U) macro
34934 … (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h34930 #define TRNG_VID2_ECO_REV_MASK (0xFF00U) macro
34935 … (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h32789 #define TRNG_VID2_ECO_REV_MASK (0xFF00U) macro
32794 … (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h29846 #define TRNG_VID2_ECO_REV_MASK (0xFF00U) macro
29851 … (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h37996 #define TRNG_VID2_ECO_REV_MASK (0xFF00U) macro
38001 … (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h42997 #define TRNG_VID2_ECO_REV_MASK (0xFF00U) macro
43002 … (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h38093 #define TRNG_VID2_ECO_REV_MASK (0xFF00U) macro
38098 … (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1024/
DMIMXRT1024.h38072 #define TRNG_VID2_ECO_REV_MASK (0xFF00U) macro
38077 … (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1041/
DMIMXRT1041.h41156 #define TRNG_VID2_ECO_REV_MASK (0xFF00U) macro
41161 … (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1051/
DMIMXRT1051.h39647 #define TRNG_VID2_ECO_REV_MASK (0xFF00U) macro
39652 … (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h51207 #define TRNG_VID2_ECO_REV_MASK (0xFF00U) macro
51212 … (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1042/
DMIMXRT1042.h44566 #define TRNG_VID2_ECO_REV_MASK (0xFF00U) macro
44571 … (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1052/
DMIMXRT1052.h43913 #define TRNG_VID2_ECO_REV_MASK (0xFF00U) macro
43918 … (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1061/
DMIMXRT1061.h42040 #define TRNG_VID2_ECO_REV_MASK (0xFF00U) macro
42045 … (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1062/
DMIMXRT1062.h46234 #define TRNG_VID2_ECO_REV_MASK (0xFF00U) macro
46239 … (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1064/
DMIMXRT1064.h46170 #define TRNG_VID2_ECO_REV_MASK (0xFF00U) macro
46175 … (((uint32_t)(((uint32_t)(x)) << TRNG_VID2_ECO_REV_SHIFT)) & TRNG_VID2_ECO_REV_MASK)

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