Home
last modified time | relevance | path

Searched refs:TRNG_STATUS_TF4BR1_MASK (Results 1 – 25 of 37) sorted by relevance

12

/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A31A/
DK32L2A31A.h17348 #define TRNG_STATUS_TF4BR1_MASK (0x80U) macro
17350 … (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR1_SHIFT)) & TRNG_STATUS_TF4BR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L2A41A/
DK32L2A41A.h17348 #define TRNG_STATUS_TF4BR1_MASK (0x80U) macro
17350 … (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR1_SHIFT)) & TRNG_STATUS_TF4BR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW31Z4/
DMKW31Z4.h7550 #define TRNG_STATUS_TF4BR1_MASK (0x80U) macro
7552 … (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR1_SHIFT)) & TRNG_STATUS_TF4BR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW20Z4/
DMKW20Z4.h8556 #define TRNG_STATUS_TF4BR1_MASK 0x80u macro
8559 … (((uint32_t)(((uint32_t)(x))<<TRNG_STATUS_TF4BR1_SHIFT))&TRNG_STATUS_TF4BR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW21Z4/
DMKW21Z4.h7479 #define TRNG_STATUS_TF4BR1_MASK (0x80U) macro
7481 … (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR1_SHIFT)) & TRNG_STATUS_TF4BR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW30Z4/
DMKW30Z4.h8556 #define TRNG_STATUS_TF4BR1_MASK 0x80u macro
8559 … (((uint32_t)(((uint32_t)(x))<<TRNG_STATUS_TF4BR1_SHIFT))&TRNG_STATUS_TF4BR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/K32L3A60/
DK32L3A60_cm4.h21564 #define TRNG_STATUS_TF4BR1_MASK (0x80U) macro
21566 … (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR1_SHIFT)) & TRNG_STATUS_TF4BR1_MASK)
DK32L3A60_cm0plus.h21674 #define TRNG_STATUS_TF4BR1_MASK (0x80U) macro
21676 … (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR1_SHIFT)) & TRNG_STATUS_TF4BR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW40Z4/
DMKW40Z4.h8556 #define TRNG_STATUS_TF4BR1_MASK 0x80u macro
8559 … (((uint32_t)(((uint32_t)(x))<<TRNG_STATUS_TF4BR1_SHIFT))&TRNG_STATUS_TF4BR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW41Z4/
DMKW41Z4.h7550 #define TRNG_STATUS_TF4BR1_MASK (0x80U) macro
7552 … (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR1_SHIFT)) & TRNG_STATUS_TF4BR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV56F24/
DMKV56F24.h25629 #define TRNG_STATUS_TF4BR1_MASK (0x80U) macro
25631 … (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR1_SHIFT)) & TRNG_STATUS_TF4BR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MKV58F24/
DMKV58F24.h27395 #define TRNG_STATUS_TF4BR1_MASK (0x80U) macro
27397 … (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR1_SHIFT)) & TRNG_STATUS_TF4BR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK80F25615/
DMK80F25615.h24486 #define TRNG_STATUS_TF4BR1_MASK (0x80U) macro
24488 … (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR1_SHIFT)) & TRNG_STATUS_TF4BR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK82F25615/
DMK82F25615.h25466 #define TRNG_STATUS_TF4BR1_MASK (0x80U) macro
25468 … (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR1_SHIFT)) & TRNG_STATUS_TF4BR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h28066 #define TRNG_STATUS_TF4BR1_MASK (0x80U) macro
28068 … (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR1_SHIFT)) & TRNG_STATUS_TF4BR1_MASK)
DMIMXRT685S_cm33.h37717 #define TRNG_STATUS_TF4BR1_MASK (0x80U) macro
37719 … (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR1_SHIFT)) & TRNG_STATUS_TF4BR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK27FA15/
DMK27FA15.h24120 #define TRNG_STATUS_TF4BR1_MASK (0x80U) macro
24122 … (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR1_SHIFT)) & TRNG_STATUS_TF4BR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK28FA15/
DMK28FA15.h24122 #define TRNG_STATUS_TF4BR1_MASK (0x80U) macro
24124 … (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR1_SHIFT)) & TRNG_STATUS_TF4BR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U3/
DMCIMX7U3_cm4.h34630 #define TRNG_STATUS_TF4BR1_MASK (0x80U) macro
34632 … (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR1_SHIFT)) & TRNG_STATUS_TF4BR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MCIMX7U5/
DMCIMX7U5_cm4.h34631 #define TRNG_STATUS_TF4BR1_MASK (0x80U) macro
34633 … (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR1_SHIFT)) & TRNG_STATUS_TF4BR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1015/
DMIMXRT1015.h32498 #define TRNG_STATUS_TF4BR1_MASK (0x80U) macro
32500 … (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR1_SHIFT)) & TRNG_STATUS_TF4BR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1011/
DMIMXRT1011.h29555 #define TRNG_STATUS_TF4BR1_MASK (0x80U) macro
29557 … (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR1_SHIFT)) & TRNG_STATUS_TF4BR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h37717 #define TRNG_STATUS_TF4BR1_MASK (0x80U) macro
37719 … (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR1_SHIFT)) & TRNG_STATUS_TF4BR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h42706 #define TRNG_STATUS_TF4BR1_MASK (0x80U) macro
42708 … (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR1_SHIFT)) & TRNG_STATUS_TF4BR1_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT1021/
DMIMXRT1021.h37802 #define TRNG_STATUS_TF4BR1_MASK (0x80U) macro
37804 … (((uint32_t)(((uint32_t)(x)) << TRNG_STATUS_TF4BR1_SHIFT)) & TRNG_STATUS_TF4BR1_MASK)

12