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Searched refs:TMU_TMLTCR_TP5_MASK (Results 1 – 3 of 3) sorted by relevance

/hal_nxp-latest/s32/drivers/s32ze/BaseNXP/header/
DS32Z2_TMU.h343 #define TMU_TMLTCR_TP5_MASK (0x200U) macro
346 … (((uint32_t)(((uint32_t)(x)) << TMU_TMLTCR_TP5_SHIFT)) & TMU_TMLTCR_TP5_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMX9352/
DMIMX9352_cm33.h72227 #define TMU_TMLTCR_TP5_MASK (0x200U) macro
72230 … (((uint32_t)(((uint32_t)(x)) << TMU_TMLTCR_TP5_SHIFT)) & TMU_TMLTCR_TP5_MASK)
DMIMX9352_ca55.h72211 #define TMU_TMLTCR_TP5_MASK (0x200U) macro
72214 … (((uint32_t)(((uint32_t)(x)) << TMU_TMLTCR_TP5_SHIFT)) & TMU_TMLTCR_TP5_MASK)