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Searched refs:TCSR (Results 1 – 25 of 152) sorted by relevance

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/hal_nxp-latest/mcux/mcux-sdk/drivers/sai/
Dfsl_sai.h844 return base->TCSR; in SAI_TxGetStatusFlag()
858 base->TCSR = ((base->TCSR & 0xFFE3FFFFU) | mask); in SAI_TxClearStatusFlags()
1061 base->TCSR = ((base->TCSR & 0xFFE3FFFFU) | mask); in SAI_TxEnableInterrupts()
1095 base->TCSR = ((base->TCSR & 0xFFE3FFFFU) & (~mask)); in SAI_TxDisableInterrupts()
1135 base->TCSR = ((base->TCSR & 0xFFE3FFFFU) | mask); in SAI_TxEnableDMA()
1139 base->TCSR = ((base->TCSR & 0xFFE3FFFFU) & (~mask)); in SAI_TxEnableDMA()
Dfsl_sai.c182 uint32_t tcsr = base->TCSR; in SAI_TxGetEnabledInterruptStatus()
425 base->TCSR &= in SAI_Init()
431 base->TCSR &= ~(I2S_TCSR_FWIE_MASK | I2S_TCSR_FEIE_MASK | I2S_TCSR_FWDE_MASK); in SAI_Init()
463 base->TCSR = I2S_TCSR_SR_MASK | I2S_TCSR_FR_MASK; in SAI_TxReset()
466 base->TCSR &= ~I2S_TCSR_SR_MASK; in SAI_TxReset()
520 base->TCSR = ((base->TCSR & 0xFFE3FFFFU) | I2S_TCSR_BCE_MASK); in SAI_TxEnable()
521 base->TCSR = ((base->TCSR & 0xFFE3FFFFU) | I2S_TCSR_TE_MASK); in SAI_TxEnable()
531 base->TCSR = ((base->TCSR & 0xFFE3FFFFU) & (~I2S_TCSR_TE_MASK)); in SAI_TxEnable()
549 base->TCSR = ((base->TCSR & 0xFFE3FFFFU) | I2S_TCSR_BCE_MASK); in SAI_RxEnable()
550 base->TCSR = ((base->TCSR & 0xFFE3FFFFU) | I2S_TCSR_TE_MASK); in SAI_RxEnable()
[all …]
Dfsl_sai_edma.c877 if ((base->TCSR & I2S_TCSR_TE_MASK) == 0UL) in SAI_TransferAbortSendEDMA()
879 base->TCSR |= (I2S_TCSR_FR_MASK | I2S_TCSR_SR_MASK); in SAI_TransferAbortSendEDMA()
880 base->TCSR &= ~I2S_TCSR_SR_MASK; in SAI_TransferAbortSendEDMA()
Dfsl_sai_sdma.c545 base->TCSR |= (I2S_TCSR_FR_MASK | I2S_TCSR_SR_MASK); in SAI_TransferAbortSendSDMA()
546 base->TCSR &= ~I2S_TCSR_SR_MASK; in SAI_TransferAbortSendSDMA()
/hal_nxp-latest/mcux/mcux-sdk/drivers/enet/
Dfsl_enet.h1835 base->CHANNEL[channel].TCSR = 0; in ENET_Ptp1588SetChannelMode()
1836 base->CHANNEL[channel].TCSR = tcrReg; in ENET_Ptp1588SetChannelMode()
1878 base->CHANNEL[channel].TCSR = 0; in ENET_Ptp1588SetChannelOutputPulseWidth()
1879 base->CHANNEL[channel].TCSR = tcrReg; in ENET_Ptp1588SetChannelOutputPulseWidth()
1904 return (0U != (base->CHANNEL[channel].TCSR & ENET_TCSR_TF_MASK)); in ENET_Ptp1588GetChannelStatus()
1915 base->CHANNEL[channel].TCSR |= ENET_TCSR_TF_MASK; in ENET_Ptp1588ClearChannelStatus()
/hal_nxp-latest/s32/drivers/s32k3/BaseNXP/header/
DS32K344_SAI.h81 __IO uint32_t TCSR; /**< Transmit Control, offset: 0x8 */ member
/hal_nxp-latest/s32/drivers/s32k1/BaseNXP/header/
DS32K148_SAI.h81 …__IO uint32_t TCSR; /**< SAI Transmit Control Register, offset: 0x8 */ member
DS32K148_ENET.h188 …__IO uint32_t TCSR; /**< Timer Control Status Register, array offset:… member
/hal_nxp-latest/mcux/mcux-sdk/components/audio/
Dfsl_adapter_sai.c83 if (0U != (base->TCSR & (uint32_t)kSAI_FIFOErrorFlag)) in HAL_AudioFifoErrorIsr()
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC144/
DMCXC144.h3342 …__IO uint32_t TCSR; /**< SAI Transmit Control Register, offset: 0x0 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC143/
DMCXC143.h3342 …__IO uint32_t TCSR; /**< SAI Transmit Control Register, offset: 0x0 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC243/
DMCXC243.h3340 …__IO uint32_t TCSR; /**< SAI Transmit Control Register, offset: 0x0 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC244/
DMCXC244.h3342 …__IO uint32_t TCSR; /**< SAI Transmit Control Register, offset: 0x0 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MK64F12/
DMK64F12.h9822 …__IO uint32_t TCSR; /**< Timer Control Status Register, array offset:… member
14899 …__IO uint32_t TCSR; /**< SAI Transmit Control Register, offset: 0x0 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MK63F12/
DMK63F12.h9809 …__IO uint32_t TCSR; /**< Timer Control Status Register, array offset:… member
14853 …__IO uint32_t TCSR; /**< SAI Transmit Control Register, offset: 0x0 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F12810/
DMK22F12810.h5591 …__IO uint32_t TCSR; /**< SAI Transmit Control Register, offset: 0x0 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC444/
DMCXC444.h3342 …__IO uint32_t TCSR; /**< SAI Transmit Control Register, offset: 0x0 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MCXC443/
DMCXC443.h3342 …__IO uint32_t TCSR; /**< SAI Transmit Control Register, offset: 0x0 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW22D5/
DMKW22D5.h4024 …__IO uint32_t TCSR; /**< SAI Transmit Control Register, offset: 0x0 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW24D5/
DMKW24D5.h4024 …__IO uint32_t TCSR; /**< SAI Transmit Control Register, offset: 0x0 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F25612/
DMK22F25612.h6358 …__IO uint32_t TCSR; /**< SAI Transmit Control Register, offset: 0x0 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MK22F51212/
DMK22F51212.h6614 …__IO uint32_t TCSR; /**< SAI Transmit Control Register, offset: 0x0 */ member
/hal_nxp-latest/imx/devices/MCIMX6X/
DMCIMX6X_M4.h8575 …__IO uint32_t TCSR; /**< Timer Control Status Register, array… member
8699 #define ENET_TCSR_REG(base,index) ((base)->TC[index].TCSR)
15254 …__IO uint32_t TCSR; /**< SAI Transmit Control Register, offset:… member
15291 #define I2S_TCSR_REG(base) ((base)->TCSR)
/hal_nxp-latest/mcux/mcux-sdk/devices/MK65F18/
DMK65F18.h11452 …__IO uint32_t TCSR; /**< Timer Control Status Register, array offset:… member
16812 …__IO uint32_t TCSR; /**< SAI Transmit Control Register, offset: 0x0 */ member
/hal_nxp-latest/mcux/mcux-sdk/devices/MK66F18/
DMK66F18.h11452 …__IO uint32_t TCSR; /**< Timer Control Status Register, array offset:… member
16812 …__IO uint32_t TCSR; /**< SAI Transmit Control Register, offset: 0x0 */ member

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