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Searched refs:SYSTEM_MCG_C1_VALUE (Results 1 – 6 of 6) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MKW40Z4/
Dsystem_MKW40Z4.h154 #define SYSTEM_MCG_C1_VALUE 0x06U /* MCG_C1 */ macro
175 #define SYSTEM_MCG_C1_VALUE 0x06U /* MCG_C1 */
196 #define SYSTEM_MCG_C1_VALUE 0x46U /* MCG_C1 */
217 #define SYSTEM_MCG_C1_VALUE 0xAAU /* MCG_C1 */
238 #define SYSTEM_MCG_C1_VALUE 0xAAU /* MCG_C1 */
Dsystem_MKW40Z4.c151 …MCG->C1 = SYSTEM_MCG_C1_VALUE; /* Set C1 (clock source selection, FLL ext. reference divider… in SystemInit()
153 if (((SYSTEM_MCG_C1_VALUE) & MCG_C1_IREFS_MASK) != 0x00U) { in SystemInit()
173 …MCG->C1 = SYSTEM_MCG_C1_VALUE; /* Set C1 (clock source selection, FLL ext. reference divider… in SystemInit()
175 if (((SYSTEM_MCG_C1_VALUE) & MCG_C1_IREFS_MASK) != 0x00U) { in SystemInit()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW20Z4/
Dsystem_MKW20Z4.h154 #define SYSTEM_MCG_C1_VALUE 0x06U /* MCG_C1 */ macro
175 #define SYSTEM_MCG_C1_VALUE 0x06U /* MCG_C1 */
196 #define SYSTEM_MCG_C1_VALUE 0x46U /* MCG_C1 */
217 #define SYSTEM_MCG_C1_VALUE 0xAAU /* MCG_C1 */
238 #define SYSTEM_MCG_C1_VALUE 0xAAU /* MCG_C1 */
Dsystem_MKW20Z4.c151 …MCG->C1 = SYSTEM_MCG_C1_VALUE; /* Set C1 (clock source selection, FLL ext. reference divider… in SystemInit()
153 if (((SYSTEM_MCG_C1_VALUE) & MCG_C1_IREFS_MASK) != 0x00U) { in SystemInit()
173 …MCG->C1 = SYSTEM_MCG_C1_VALUE; /* Set C1 (clock source selection, FLL ext. reference divider… in SystemInit()
175 if (((SYSTEM_MCG_C1_VALUE) & MCG_C1_IREFS_MASK) != 0x00U) { in SystemInit()
/hal_nxp-latest/mcux/mcux-sdk/devices/MKW30Z4/
Dsystem_MKW30Z4.h154 #define SYSTEM_MCG_C1_VALUE 0x06U /* MCG_C1 */ macro
175 #define SYSTEM_MCG_C1_VALUE 0x06U /* MCG_C1 */
196 #define SYSTEM_MCG_C1_VALUE 0x46U /* MCG_C1 */
217 #define SYSTEM_MCG_C1_VALUE 0xAAU /* MCG_C1 */
238 #define SYSTEM_MCG_C1_VALUE 0xAAU /* MCG_C1 */
Dsystem_MKW30Z4.c151 …MCG->C1 = SYSTEM_MCG_C1_VALUE; /* Set C1 (clock source selection, FLL ext. reference divider… in SystemInit()
153 if (((SYSTEM_MCG_C1_VALUE) & MCG_C1_IREFS_MASK) != 0x00U) { in SystemInit()
173 …MCG->C1 = SYSTEM_MCG_C1_VALUE; /* Set C1 (clock source selection, FLL ext. reference divider… in SystemInit()
175 if (((SYSTEM_MCG_C1_VALUE) & MCG_C1_IREFS_MASK) != 0x00U) { in SystemInit()