Home
last modified time | relevance | path

Searched refs:SYSCTL0_STARTEN1_CLR_FLEXCOMM7_MASK (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h26877 #define SYSCTL0_STARTEN1_CLR_FLEXCOMM7_MASK (0x1000U) macro
26883 …t)(((uint32_t)(x)) << SYSCTL0_STARTEN1_CLR_FLEXCOMM7_SHIFT)) & SYSCTL0_STARTEN1_CLR_FLEXCOMM7_MASK)
DMIMXRT685S_cm33.h36490 #define SYSCTL0_STARTEN1_CLR_FLEXCOMM7_MASK (0x1000U) macro
36496 …t)(((uint32_t)(x)) << SYSCTL0_STARTEN1_CLR_FLEXCOMM7_SHIFT)) & SYSCTL0_STARTEN1_CLR_FLEXCOMM7_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h36490 #define SYSCTL0_STARTEN1_CLR_FLEXCOMM7_MASK (0x1000U) macro
36496 …t)(((uint32_t)(x)) << SYSCTL0_STARTEN1_CLR_FLEXCOMM7_SHIFT)) & SYSCTL0_STARTEN1_CLR_FLEXCOMM7_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h41326 #define SYSCTL0_STARTEN1_CLR_FLEXCOMM7_MASK (0x1000U) macro
41332 …t)(((uint32_t)(x)) << SYSCTL0_STARTEN1_CLR_FLEXCOMM7_SHIFT)) & SYSCTL0_STARTEN1_CLR_FLEXCOMM7_MASK)
DMIMXRT595S_cm33.h51125 #define SYSCTL0_STARTEN1_CLR_FLEXCOMM7_MASK (0x1000U) macro
51131 …t)(((uint32_t)(x)) << SYSCTL0_STARTEN1_CLR_FLEXCOMM7_SHIFT)) & SYSCTL0_STARTEN1_CLR_FLEXCOMM7_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h49498 #define SYSCTL0_STARTEN1_CLR_FLEXCOMM7_MASK (0x1000U) macro
49504 …t)(((uint32_t)(x)) << SYSCTL0_STARTEN1_CLR_FLEXCOMM7_SHIFT)) & SYSCTL0_STARTEN1_CLR_FLEXCOMM7_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h51124 #define SYSCTL0_STARTEN1_CLR_FLEXCOMM7_MASK (0x1000U) macro
51130 …t)(((uint32_t)(x)) << SYSCTL0_STARTEN1_CLR_FLEXCOMM7_SHIFT)) & SYSCTL0_STARTEN1_CLR_FLEXCOMM7_MASK)