Home
last modified time | relevance | path

Searched refs:SYSCTL0_STARTEN1_CLR_FLEXCOMM10_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h41446 #define SYSCTL0_STARTEN1_CLR_FLEXCOMM10_MASK (0x40000000U) macro
41452 …(((uint32_t)(x)) << SYSCTL0_STARTEN1_CLR_FLEXCOMM10_SHIFT)) & SYSCTL0_STARTEN1_CLR_FLEXCOMM10_MASK)
DMIMXRT595S_cm33.h51245 #define SYSCTL0_STARTEN1_CLR_FLEXCOMM10_MASK (0x40000000U) macro
51251 …(((uint32_t)(x)) << SYSCTL0_STARTEN1_CLR_FLEXCOMM10_SHIFT)) & SYSCTL0_STARTEN1_CLR_FLEXCOMM10_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h49618 #define SYSCTL0_STARTEN1_CLR_FLEXCOMM10_MASK (0x40000000U) macro
49624 …(((uint32_t)(x)) << SYSCTL0_STARTEN1_CLR_FLEXCOMM10_SHIFT)) & SYSCTL0_STARTEN1_CLR_FLEXCOMM10_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h51244 #define SYSCTL0_STARTEN1_CLR_FLEXCOMM10_MASK (0x40000000U) macro
51250 …(((uint32_t)(x)) << SYSCTL0_STARTEN1_CLR_FLEXCOMM10_SHIFT)) & SYSCTL0_STARTEN1_CLR_FLEXCOMM10_MASK)