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Searched refs:SYSCTL0_STARTEN0_CLR_FLEXCOMM15_MASK (Results 1 – 7 of 7) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT685S/
DMIMXRT685S_dsp.h26721 #define SYSCTL0_STARTEN0_CLR_FLEXCOMM15_MASK (0x200000U) macro
26727 …(((uint32_t)(x)) << SYSCTL0_STARTEN0_CLR_FLEXCOMM15_SHIFT)) & SYSCTL0_STARTEN0_CLR_FLEXCOMM15_MASK)
DMIMXRT685S_cm33.h36334 #define SYSCTL0_STARTEN0_CLR_FLEXCOMM15_MASK (0x200000U) macro
36340 …(((uint32_t)(x)) << SYSCTL0_STARTEN0_CLR_FLEXCOMM15_SHIFT)) & SYSCTL0_STARTEN0_CLR_FLEXCOMM15_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT633S/
DMIMXRT633S.h36334 #define SYSCTL0_STARTEN0_CLR_FLEXCOMM15_MASK (0x200000U) macro
36340 …(((uint32_t)(x)) << SYSCTL0_STARTEN0_CLR_FLEXCOMM15_SHIFT)) & SYSCTL0_STARTEN0_CLR_FLEXCOMM15_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h41162 #define SYSCTL0_STARTEN0_CLR_FLEXCOMM15_MASK (0x200000U) macro
41168 …(((uint32_t)(x)) << SYSCTL0_STARTEN0_CLR_FLEXCOMM15_SHIFT)) & SYSCTL0_STARTEN0_CLR_FLEXCOMM15_MASK)
DMIMXRT595S_cm33.h50961 #define SYSCTL0_STARTEN0_CLR_FLEXCOMM15_MASK (0x200000U) macro
50967 …(((uint32_t)(x)) << SYSCTL0_STARTEN0_CLR_FLEXCOMM15_SHIFT)) & SYSCTL0_STARTEN0_CLR_FLEXCOMM15_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h49334 #define SYSCTL0_STARTEN0_CLR_FLEXCOMM15_MASK (0x200000U) macro
49340 …(((uint32_t)(x)) << SYSCTL0_STARTEN0_CLR_FLEXCOMM15_SHIFT)) & SYSCTL0_STARTEN0_CLR_FLEXCOMM15_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h50960 #define SYSCTL0_STARTEN0_CLR_FLEXCOMM15_MASK (0x200000U) macro
50966 …(((uint32_t)(x)) << SYSCTL0_STARTEN0_CLR_FLEXCOMM15_SHIFT)) & SYSCTL0_STARTEN0_CLR_FLEXCOMM15_MASK)