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Searched refs:SYSCTL0_PDRUNCFG1_SET_LCDIF_SRAM_APD_MASK (Results 1 – 4 of 4) sorted by relevance

/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT595S/
DMIMXRT595S_dsp.h38458 #define SYSCTL0_PDRUNCFG1_SET_LCDIF_SRAM_APD_MASK (0x100000U) macro
38464 …t)(x)) << SYSCTL0_PDRUNCFG1_SET_LCDIF_SRAM_APD_SHIFT)) & SYSCTL0_PDRUNCFG1_SET_LCDIF_SRAM_APD_MASK)
DMIMXRT595S_cm33.h48257 #define SYSCTL0_PDRUNCFG1_SET_LCDIF_SRAM_APD_MASK (0x100000U) macro
48263 …t)(x)) << SYSCTL0_PDRUNCFG1_SET_LCDIF_SRAM_APD_SHIFT)) & SYSCTL0_PDRUNCFG1_SET_LCDIF_SRAM_APD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT533S/
DMIMXRT533S.h46630 #define SYSCTL0_PDRUNCFG1_SET_LCDIF_SRAM_APD_MASK (0x100000U) macro
46636 …t)(x)) << SYSCTL0_PDRUNCFG1_SET_LCDIF_SRAM_APD_SHIFT)) & SYSCTL0_PDRUNCFG1_SET_LCDIF_SRAM_APD_MASK)
/hal_nxp-latest/mcux/mcux-sdk/devices/MIMXRT555S/
DMIMXRT555S.h48256 #define SYSCTL0_PDRUNCFG1_SET_LCDIF_SRAM_APD_MASK (0x100000U) macro
48262 …t)(x)) << SYSCTL0_PDRUNCFG1_SET_LCDIF_SRAM_APD_SHIFT)) & SYSCTL0_PDRUNCFG1_SET_LCDIF_SRAM_APD_MASK)