| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC54607/ |
| D | LPC54607.h | 14724 #define SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT (0U) macro 14727 …RL_CCLK_DRV_PHASE(x) (((uint32_t)(((uint32_t)(x)) << SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT))…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S005/ |
| D | LPC54S005.h | 14666 #define SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT (0U) macro 14669 …RL_CCLK_DRV_PHASE(x) (((uint32_t)(((uint32_t)(x)) << SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT))…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC54005/ |
| D | LPC54005.h | 13874 #define SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT (0U) macro 13877 …RL_CCLK_DRV_PHASE(x) (((uint32_t)(((uint32_t)(x)) << SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT))…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC54605/ |
| D | LPC54605.h | 14080 #define SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT (0U) macro 14083 …RL_CCLK_DRV_PHASE(x) (((uint32_t)(((uint32_t)(x)) << SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT))…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC54606/ |
| D | LPC54606.h | 18228 #define SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT (0U) macro 18231 …RL_CCLK_DRV_PHASE(x) (((uint32_t)(((uint32_t)(x)) << SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT))…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC54016/ |
| D | LPC54016.h | 16997 #define SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT (0U) macro 16999 …RL_CCLK_DRV_PHASE(x) (((uint32_t)(((uint32_t)(x)) << SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT))…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC54616/ |
| D | LPC54616.h | 18303 #define SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT (0U) macro 18306 …RL_CCLK_DRV_PHASE(x) (((uint32_t)(((uint32_t)(x)) << SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT))…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC54018M/ |
| D | LPC54018M.h | 18767 #define SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT (0U) macro 18770 …RL_CCLK_DRV_PHASE(x) (((uint32_t)(((uint32_t)(x)) << SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT))…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC54628/ |
| D | LPC54628.h | 19149 #define SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT (0U) macro 19152 …RL_CCLK_DRV_PHASE(x) (((uint32_t)(((uint32_t)(x)) << SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT))…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC54618/ |
| D | LPC54618.h | 18948 #define SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT (0U) macro 18951 …RL_CCLK_DRV_PHASE(x) (((uint32_t)(((uint32_t)(x)) << SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT))…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S018/ |
| D | LPC54S018.h | 19559 #define SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT (0U) macro 19562 …RL_CCLK_DRV_PHASE(x) (((uint32_t)(((uint32_t)(x)) << SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT))…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC54018/ |
| D | LPC54018.h | 18767 #define SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT (0U) macro 18770 …RL_CCLK_DRV_PHASE(x) (((uint32_t)(((uint32_t)(x)) << SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT))…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S016/ |
| D | LPC54S016.h | 17703 #define SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT (0U) macro 17705 …RL_CCLK_DRV_PHASE(x) (((uint32_t)(((uint32_t)(x)) << SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT))…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC54608/ |
| D | LPC54608.h | 18871 #define SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT (0U) macro 18874 …RL_CCLK_DRV_PHASE(x) (((uint32_t)(((uint32_t)(x)) << SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT))…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC54S018M/ |
| D | LPC54S018M.h | 19559 #define SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT (0U) macro 19562 …RL_CCLK_DRV_PHASE(x) (((uint32_t)(((uint32_t)(x)) << SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT))…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC5526/ |
| D | LPC5526.h | 22038 #define SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT (0U) macro 22045 …RL_CCLK_DRV_PHASE(x) (((uint32_t)(((uint32_t)(x)) << SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT))…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC5528/ |
| D | LPC5528.h | 22037 #define SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT (0U) macro 22044 …RL_CCLK_DRV_PHASE(x) (((uint32_t)(((uint32_t)(x)) << SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT))…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S26/ |
| D | LPC55S26.h | 23694 #define SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT (0U) macro 23701 …RL_CCLK_DRV_PHASE(x) (((uint32_t)(((uint32_t)(x)) << SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT))…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S28/ |
| D | LPC55S28.h | 23693 #define SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT (0U) macro 23700 …RL_CCLK_DRV_PHASE(x) (((uint32_t)(((uint32_t)(x)) << SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT))…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S66/ |
| D | LPC55S66_cm33_core1.h | 24314 #define SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT (0U) macro 24321 …RL_CCLK_DRV_PHASE(x) (((uint32_t)(((uint32_t)(x)) << SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT))…
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| D | LPC55S66_cm33_core0.h | 24314 #define SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT (0U) macro 24321 …RL_CCLK_DRV_PHASE(x) (((uint32_t)(((uint32_t)(x)) << SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT))…
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| /hal_nxp-latest/mcux/mcux-sdk/devices/LPC55S69/ |
| D | LPC55S69_cm33_core1.h | 24313 #define SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT (0U) macro 24320 …RL_CCLK_DRV_PHASE(x) (((uint32_t)(((uint32_t)(x)) << SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT))…
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| D | LPC55S69_cm33_core0.h | 24313 #define SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT (0U) macro 24320 …RL_CCLK_DRV_PHASE(x) (((uint32_t)(((uint32_t)(x)) << SYSCON_SDIOCLKCTRL_CCLK_DRV_PHASE_SHIFT))…
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